Flash Memory Wear-Leveling via Logical Group Data Exchange
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Solution Overview
Problem
Existing storage systems using flash memories face challenges in wear-leveling across multiple flash memory modules, leading to uneven erase counts and rapid module degradation, as conventional methods require mapping information on physical blocks and increase management loads when applied to large-scale systems without a memory controller.
Innovation Solution
A storage system and method that combines multiple flash memory modules into logical groups, using a storage controller to manage erase counts by translating addresses and exchanging data between modules with high and low write sizes, thereby leveling erase counts without relying on physical block mapping information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wear-leveling methods using physical block mapping are applied to large-scale flash memory systems, then wear distribution is improved, but management complexity and system load increase significantly
Solution Approach 1:
The patent replaces complex physical block mapping information with simplified logical unit mapping. Instead of tracking individual physical blocks across multiple flash memory modules, the system creates logical units that abstract away the physical complexity, thereby reducing management overhead while maintaining wear-leveling effectiveness
Solution Approach 2:
The patent divides the flash memory system into independent logical units that can be managed separately. Each logical unit encompasses multiple physical blocks distributed across different modules, allowing the system to manage wear at a higher level of abstraction without needing to track every individual physical block
2Productivity
If intensive data rewriting is performed on specific flash memory blocks, then data update capability is improved, but erase count on those blocks increases excessively leading to rapid degradation
Solution Approach 1:
The patent implements dynamic mapping that automatically adjusts the association between logical units and physical blocks based on current wear status. When certain blocks approach their erase limit, the system dynamically remaps logical units to different physical blocks, enabling continuous data updates while distributing wear evenly across all modules
Solution Approach 2:
The system monitors erase counts and write operations in real-time, using this feedback to make intelligent decisions about data placement and block remapping. This feedback mechanism ensures that intensive rewriting operations are directed to modules with lower current wear, preventing any single module from degrading rapidly
3Device complexity
If flash memory modules are used without wear-leveling management, then system simplicity is maintained, but specific blocks experience excessive erase counts causing system failure
Solution Approach 1:
The patent creates a universal logical unit structure that can be applied across different flash memory module configurations. This unified approach provides wear-leveling protection through a standardized mechanism that works regardless of the specific hardware setup, maintaining simplicity while ensuring reliability across diverse system configurations
Data Source
AI summary
A system including flash memory modules and a system controller. Each flash memory module includes flash memory chips and a memory controller to manage a plurality of blocks in the plurality of flash memory chips. The blocks are units for erasing data stored in the flash memory chips. The system controller performs wear leveling by exchanging data between a first flash memory module and a second flash memory module of the flash memory modules.