Flash Memory Wear-Leveling Loop Control

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Solution Overview

Problem

Conventional nonvolatile memory devices face issues with over-programming due to repetitive supply of program voltage, leading to widening of threshold voltage distribution and potential read errors, causing device failures.

Innovation Solution

The solution involves adjusting the initial level of program voltage based on wear-leveling information, processing memory blocks as bad blocks if their loop number exceeds a reference range, and managing target loop numbers to prevent over-programming, thereby reducing the risk of device failure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If program loops are repeated with incremented program voltage using ISPP scheme, then programming completeness is improved, but over-programming occurs causing threshold voltage distribution widening and read errors

Engineering Contradiction:
Improveprogramming completenessVSAvoidread error rate
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by determining a maximum program loop number in advance based on wear-leveling information before actual programming occurs. This pre-determined limit prevents over-programming by stopping the program loops before threshold voltage distribution widens excessively, thereby resolving the contradiction between programming completeness and read error rate.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If program voltage is incremented for each program loop, then programming of difficult cells is achieved, but memory cells supplied with high voltages are overly programmed

Engineering Contradiction:
Improveprogramming uniformityVSAvoidprogram disturbance
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the maximum program loop number based on wear-leveling information that reflects the state of memory blocks. By changing this parameter according to block wear status, the system prevents program disturbance and over-programming while maintaining programming uniformity across different blocks with different wear levels.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If maximum program loop number is increased to ensure all data bits are programmed, then programming coverage is improved, but threshold voltage distribution transfers and device fail occurs

Engineering Contradiction:
Improveprogramming coverageVSAvoiddevice functionality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies dynamics by making the maximum program loop number a dynamic parameter rather than a fixed value. The loop number is adjusted based on wear-leveling information that changes with block usage, allowing the system to adapt programming limits to actual block conditions. This dynamic adjustment ensures programming coverage while preventing device fail from threshold voltage distribution transfer.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8305804B2Flash memory device and system including the same
Publication Date: 2012.11.06 SAMSUNG ELECTRONICS CO LTD
  • US8305804B2 patent drawing
  • US8305804B2 patent drawing
  • US8305804B2 patent drawing

AI summary

The invention provides an operation method of a memory system including a flash memory device. The method includes programming at least one page included in a selected memory block of the flash memory device; and determining the selected memory block or the flash memory device to be invalid, according to whether a loop number of the programmed page is out of a reference loop range.