Flash Memory Wear Estimation via Programming Duration

The patent changes the parameter used for wear estimation from program-erase cycle count to actual programming time measurement. By measuring the time required to program test data and comparing it to reference values, the system obtains accurate wear level information that reflects the actual physical state of the memory cells, including retention effects and charge trapping, rather than relying on simplistic cycle counting.

The patent makes the programming parameters dynamic by adjusting Vstep and Vstart based on the measured wear level of the memory block. For worn blocks, the system selects programming parameters from a set optimized for accuracy with lower voltage steps and more iterations. For less worn blocks, faster parameters can be used. This dynamic adaptation resolves the contradiction by allowing speed optimization when possible while ensuring accuracy when wear demands it.

The patent changes the programming parameters (Vstep, Vstart, Nmaxpulses) based on the measured wear level of each memory block. For blocks with high wear levels, the system increases Nmaxpulses and uses more conservative voltage parameters to ensure programming success. For blocks with lower wear, the system uses fewer pulses and faster parameters. This wear-adaptive approach resolves the contradiction by allocating programming resources based on actual block conditions rather than using fixed parameters for all blocks.

The patent replaces the mechanical cycle-counting mechanism with a physics-based measurement of actual programming characteristics. By measuring programming time and analyzing the relationship between applied voltage and charge trapping in worn cells, the system obtains reliable wear information even after maximum rated cycles have been exceeded. This substitution of measurement methodology maintains reliability beyond the device's rated lifetime.