Flash Memory Wordline Voltage Sequencing to Reduce Program Disturb

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Solution Overview

Problem

Flash memory cells, particularly those with multi-level or tri-level programming, face issues with program disturb due to unintended changes in stored values caused by excessive electrons during programming, leading to mis-programming and data integrity concerns.

Innovation Solution

Implementing a sequence of wordline voltage switching operations during the program verify process, where interface wordlines are switched from a high to a low voltage level before other wordlines, facilitating charge drainage and reducing the likelihood of electron trapping, thereby minimizing program disturb degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If higher programming voltage is applied to program flash memory cells, then programming speed and efficiency are improved, but program disturb degradation occurs due to inadvertent over-programming of memory cells

Engineering Contradiction:
Improveprogramming speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a verify operation before completing the programming operation. The sequence is: apply programming voltage to program the cell, then apply verify voltage to check if programming is complete. If the verify operation detects that programming is not complete (threshold voltage not yet reached), additional programming pulses are applied. This preliminary verification prevents over-programming by stopping the process at the correct threshold voltage level, thereby maintaining data integrity while achieving efficient programming.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If more electrons are made available at the memory cell channel during programming, then programming efficiency is improved, but Fowler-Nordheim tunneling causes inadvertent over-programming

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidprogram disturb
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent implements feedback control by using the verify operation to monitor the threshold voltage of programmed memory cells. The verify voltage is applied to sense whether the threshold voltage has reached the desired level. Based on this feedback information, the programming process is adjusted - if the threshold voltage is not yet sufficient, additional programming pulses are applied; if it has reached or exceeded the target, programming is stopped. This feedback mechanism prevents over-programming caused by excessive electron injection while maintaining high programming efficiency.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the occurrence of program disturb, ensuring accurate programming and maintaining data integrity by managing electron migration and voltage levels in flash memory cells.

Implementation Method 1

Flash memory cells store different quantities of charge to a floating gate of the memory cell to alter the threshold voltage of the transistor that constitutes the memory cell

Methodology Applied
Scientific EffectCharge storage: Capacitance

Implementation Method 2

If a programming voltage is higher than anticipated or if more electrons (than are anticipated) are available at the channel of the memory cell being inhibited, then Fowler-Nordheim tunneling may result in inadvertent over-programming of a memory cell

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS11270778B2Method and system for reducing program disturb degradation in flash memory
Publication Date: 2022.03.08 INTEL NDTM US LLC
  • US11270778B2 patent drawing
  • US11270778B2 patent drawing
  • US11270778B2 patent drawing

AI summary

Reduction of program disturb degradation in a flash memory cell array is facilitated by selectively switching wordline voltage levels in a sequence that reduces the likelihood of trapping electrons in memory cell channels. During a program verify operation for a memory cell in a memory cell string, a flash memory system switches wordline voltage levels from high-to-low for interface wordlines, prior to switching wordline voltages from high-to-low for other wordlines in a memory cell string. Selectively switching wordlines in a sequence in the memory cell string enables electrons to migrate to ground or to a source voltage through upper and lower select gates.