Flash Write Buffer Reallocation for Variable Write Patterns

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Solution Overview

Problem

The fixed size of the write buffer in flash memory devices can lead to inefficiencies, either becoming unavailable due to frequent fills or wasting resources when underutilized, as it does not dynamically adapt to varying write patterns.

Innovation Solution

A host device manages the write buffer size by reallocating memory resources based on usage metrics, converting memory cells between different types (TLC and SLC) to optimize buffer capacity according to usage thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the write buffer size is increased, then write latency is reduced and write performance is improved, but available main memory capacity is decreased

Engineering Contradiction:
Improvewrite performanceVSAvoidavailable main memory capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic write buffer size adjustment by monitoring write pattern characteristics (sequential vs. random writes, buffer fill rates) and automatically resizing the write buffer accordingly. The buffer can expand during high-write-periods to maintain performance and shrink during low-write-periods to free memory capacity, making the buffer size adaptive rather than fixed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the size parameter of the write buffer based on detected write patterns. When sequential writes are detected or write intensity is high, the buffer size is increased to absorb more data and reduce host latency. When random writes dominate or write intensity is low, the buffer size is decreased to preserve main memory capacity.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the write buffer size is fixed, then memory allocation is simplified and device complexity is reduced, but the buffer becomes either too small or too large for varying write patterns

Engineering Contradiction:
Improvememory allocation complexityVSAvoidbuffer adaptability to write patterns
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The write buffer management system operates autonomously by monitoring its own usage patterns and automatically adjusting its size without requiring complex host intervention. The controller detects when the buffer is consistently filling up (indicating it's too small) or remains partially empty (indicating it's too large) and self-adjusts the buffer allocation, simplifying the interface while maintaining adaptability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements feedback loops where the controller continuously monitors write buffer fill rates, write pattern types (sequential/random), and host write intensity. Based on this feedback, the controller dynamically adjusts the buffer size to optimize performance for the current workload characteristics.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12517667B2Host management of write buffer size for flash memory
Publication Date: 2026.01.06 QUALCOMM INC
  • US12517667B2 patent drawing
  • US12517667B2 patent drawing
  • US12517667B2 patent drawing

AI summary

A host device includes a host controller interface (HCI) configured to be coupled to a flash memory device (FMD). The HCI is configured to obtain an indication that a size of a particular write buffer (WB) of the FMD is to be increased. The FMD includes a plurality of memory resources that include a plurality of logical units (LUs) and at least the particular WB. The HCI is also configured to select a particular memory resource for write buffer reallocation based at least in part on a particular usage metric of the particular memory resource.