Flash Write Path Switching Across NVRAM, SLC, and QLC
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Solution Overview
Problem
Modern data storage systems face inefficiencies in data reliability and access when dealing with heterogeneous types and sizes of storage class and non-storage class memory, leading to sub-optimal operations with different types of data and metadata.
Innovation Solution
The implementation of storage systems that select from multiple write paths, including writing to non-storage class memory and bypassing it, and using mirrored RAID or parity-based RAID formats to a staging zone, optimizing write paths for various types of data and memory configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single data reliability scheme and data access scheme are used for all types of data and memory configurations, then the system is simple to operate, but the system achieves sub-optimal performance with heterogeneous memory and different types of data
Solution Approach 1:
The patent implements dynamic selection of data reliability schemes and data access schemes based on the specific combination of storage class memory and non-storage class memory present in the system, as well as the type of data being accessed. The system automatically adapts its operation mode to match the current memory configuration and data characteristics, transitioning between different reliability schemes (e.g., RAID configurations, error correction coding) and access schemes to optimize performance for each scenario.
Solution Approach 2:
The system changes operational parameters including the data reliability scheme and data access scheme based on detected memory configuration and data type. By monitoring the presence and characteristics of storage class and non-storage class memory, the system adjusts its parameters to select the most appropriate reliability and access methods, thereby achieving optimal performance across heterogeneous memory environments without requiring manual configuration.
2Productivity
If multiple data reliability schemes and data access schemes are implemented for different memory configurations, then data access efficiency is optimized, but the device complexity increases
Solution Approach 1:
The patent implements dynamic selection of data reliability schemes and data access schemes based on the specific combination of storage class memory and non-storage class memory present in the system, as well as the type of data being accessed. The system automatically adapts its operation mode to match the current memory configuration and data characteristics, transitioning between different reliability schemes (e.g., RAID configurations, error correction coding) and access schemes to optimize performance for each scenario.
Solution Approach 2:
The system performs self-diagnosis of its memory configuration and automatically selects the appropriate data reliability and access schemes without external intervention. By monitoring its own hardware composition and data characteristics, the system self-adjusts its operational parameters to maintain optimal performance across varying memory configurations, reducing the need for manual configuration and simplifying user interaction despite the underlying complexity.
3Adaptability or versatility
If heterogeneous memory of multiple sizes and types is supported, then system versatility is improved, but sub-optimal operation occurs with differing types of data and metadata
Solution Approach 1:
The system changes operational parameters including the data reliability scheme and data access scheme based on detected memory configuration and data type. By monitoring the presence and characteristics of storage class and non-storage class memory, the system adjusts its parameters to select the most appropriate reliability and access methods, thereby achieving optimal performance across heterogeneous memory environments.
Solution Approach 2:
The patent applies different data reliability schemes and data access schemes to different types of data and metadata based on their specific requirements and the local memory configuration. Instead of using a uniform approach across the entire system, the system tailors its operation to match the characteristics of each data type and its associated memory resources, ensuring optimal performance for each local context within the heterogeneous memory environment.
Data Source
AI summary
A storage system has NVRAM (nonvolatile random-access memory), storage memory that includes SLC (single level cell) flash memory and QLC (quad level cell) flash memory, and a processor. The processor performs a method that includes selecting one of a plurality of write paths for incoming data, and writing the incoming data via the selected write path. A first write path includes writing to NVRAM, writing from NVRAM to SLC flash memory and writing from SLC flash memory to QLC flash memory. A second write path includes writing to NVRAM and writing from NVRAM to QLC flash memory, bypassing SLC flash memory. A third write path includes writing to SLC flash memory, bypassing NVRAM, and writing from SLC flash memory to QLC flash memory.