Flat Display Panel Pixel Circuit Feed-Through Reduction

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Solution Overview

Problem

Conventional flat display panels experience significant feed-through effects between gate lines and pixel circuits, leading to data voltage changes that affect the accuracy of color display, particularly in RGB pixels, due to differing degrees of feed-through effects across multiple pixel circuits.

Innovation Solution

The arrangement of pixel circuits is modified to include first and second pixel units, where each second pixel unit is electrically coupled to multiple gate lines and data lines, allowing voltage levels and data to be controlled through specific voltage levels, thereby reducing the impact of feed-through effects and simplifying compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If multiple tracking gate lines are introduced to control pixel circuits independently, then frame width can be reduced, but feed-through effects between gate lines and pixel circuits increase significantly

Engineering Contradiction:
Improveframe widthVSAvoidfeed-through effect
Core Design Contradiction:
Length of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A common gate line is introduced as an intermediary component that controls multiple pixel circuits simultaneously. This common gate line acts as a mediator between the data lines and the pixel circuits, allowing voltage levels to be controlled through a shared pathway rather than through multiple tracking gate lines, thereby reducing frame width while minimizing feed-through effects on individual pixel circuits.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The common gate line serves multiple functions: it controls the turn-on/turn-off state of multiple pixel circuits (P1, P2, P3) simultaneously, provides a shared reference for voltage levels, and reduces the need for multiple separate tracking gate lines. This multi-functionality allows the display panel to maintain independent pixel control while reducing overall frame width.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If voltage levels of multiple gate lines are controlled independently, then pixel circuits can be controlled precisely, but device complexity increases due to multiple tracking gate lines

Engineering Contradiction:
Improvevoltage level control precisionVSAvoidnumber of tracking gate lines
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple gate line control functions are merged into a single common gate line. Instead of having separate tracking gate lines (TG1, TG2, TG3) for each pixel circuit, the invention combines these control functions into one common gate line that simultaneously controls multiple pixel circuits. This merging reduces device complexity by eliminating redundant tracking gate lines while maintaining precise voltage level control through the shared common gate line.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If feed-through effects are compensated for each pixel circuit individually, then color accuracy can be maintained, but compensation complexity increases significantly

Engineering Contradiction:
Improvecolor accuracyVSAvoidcompensation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The common gate line provides a universal control mechanism that applies to all pixel circuits simultaneously. By controlling the voltage level of the common gate line, the feed-through effect is reduced across all pixel circuits in a unified manner, rather than requiring separate compensation mechanisms for each pixel circuit. This universal approach maintains color accuracy while significantly simplifying the compensation process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9443459B2Flat display panel
Publication Date: 2016.09.13 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US9443459B2 patent drawing
  • US9443459B2 patent drawing
  • US9443459B2 patent drawing

AI summary

A flat display panel includes a plurality of gate lines, a plurality of data lines, a plurality of tracking gate lines and a display area. The display area is disposed with pixel modules therein. Each pixel module includes a first pixel unit and a second pixel unit. The first pixel unit is configured to determine whether to receive a data transmitted on the first predetermined data line according to a voltage level of the first predetermined gate line. The second pixel unit is configured to determine whether to receive a voltage level of the second predetermined gate line according to a voltage level of the first predetermined gate line and determine whether to receive a data from the first pixel unit according to a voltage level received from the second predetermined gate line.