Flat Panel Data Driving Circuit Settling Time
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Solution Overview
Problem
Conventional data driving circuits for flat panel displays face challenges in securing settling time within a short horizontal period and preventing signal distortion due to delays in digital-to-analog conversion and ripple generation from the switch array.
Innovation Solution
The data driving circuit configures an equal number of digital-to-analog converters (DACs) and amplifiers, with the switch array positioned between the output amplification unit and the pad, ensuring settling time is maintained during the next horizontal period and preventing signal distortion by overlapping driving.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the switch array is positioned between the DA conversion unit and the output amplification unit, then the circuit can operate with conventional configuration, but the settling time cannot be secured within the short horizontal period and signal distortion occurs
Solution Approach 1:
The patent applies preliminary action by performing the digital-to-analog conversion and amplification operations in advance during the current horizontal period, so that the data signal is fully settled before the next horizontal period begins. This allows the settling process to complete beforehand rather than competing with the horizontal period timing constraints.
Solution Approach 2:
The patent introduces an intermediary buffer structure between the output amplification unit and the switch array, which acts as a mediator to isolate the ripple effects and allow the signal to settle completely before being switched. This intermediary element resolves the conflict between fast switching and signal settling.
2Speed
If the horizontal period is shortened to meet fast display requirements, then the response speed is improved, but the settling time becomes insufficient
Solution Approach 1:
The patent performs the settling-critical operations (DAC conversion and amplification) in advance during the current horizontal period, ensuring the signal is fully settled before the shortened horizontal period elapses. This preliminary execution of critical operations resolves the timing conflict.
Solution Approach 2:
The patent maintains continuous useful action by overlapping the settling process with the display refresh cycle, ensuring that the signal settling continues uninterrupted until completion, while the system prepares the next frame of data in parallel, maximizing utilization of the available time.
3Device complexity
If the switch array is positioned between the DA conversion unit and the output amplification unit, then the circuit configuration is simplified, but signal distortion occurs due to ripple generation
Solution Approach 1:
The patent introduces an intermediary buffer structure that acts as a mediator between the amplification unit and switch array, isolating the switch array's ripple effects from the amplified signal. This intermediary element preserves signal quality while maintaining the simplified circuit configuration.
Solution Approach 2:
The patent extracts the switching operation from the critical signal path by positioning the switch array after the buffer structure, separating the high-precision amplification function from the switching function. This extraction allows each component to operate optimally without interfering with the other.
Data Source
AI summary
A data driving circuit of a flat panel display device is disclosed. Digital-to-analog controllers of a digital-to-analog conversion unit and amplifiers of an output amplification unit are configured to be equal in number and a switch array is arranged between the output amplification unit and a pad. Therefore, a settling time can be secured and distortion of a data signal can be prevented by maintaining settling during a next horizontal period and performing overlapping driving.