Flat Panel Display Device Mask Reduction via Electrode Merging
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Solution Overview
Problem
The manufacturing of active matrix flat panel display devices requires multiple masks and processes, increasing costs and complexity.
Innovation Solution
A method and structure for a flat panel display device using a reduced number of masks, featuring a substrate with semiconductor material active layers, conductive layer patterns, and insulating layers to form thin film transistors and capacitors efficiently, with dopant ions implanted in lower electrodes for conductivity, and conductive materials like amorphous ITO and metal alloys for electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple masks and processes are used to manufacture thin film transistors and capacitors, then the display device achieves proper functionality, but manufacturing costs and process complexity increase
Solution Approach 1:
The patent combines the formation of thin film transistors and capacitors into a unified manufacturing process. The semiconductor layer is patterned to form both the active layer of the transistor and the lower electrode of the capacitor simultaneously using the same mask and etching process. The gate electrode and upper electrode are also formed together in the same process step, reducing the total number of masks and process steps required.
Solution Approach 2:
The semiconductor layer serves multiple functions: it forms the active layer of the thin film transistor that controls current flow, and simultaneously forms the lower electrode of the capacitor that stores electrical charge. This multi-functional use of a single material layer eliminates the need for separate electrode formation processes.
2Manufacturing precision
If multiple masks and processes are used for manufacturing, then proper device structure is achieved, but manufacturing cost increases
Solution Approach 1:
Multiple device components are formed in consolidated process steps. The gate electrode and upper electrode are formed simultaneously in the same patterning and deposition sequence, reducing the number of separate manufacturing operations while maintaining precise structural alignment through a unified process approach.
3Reliability
If conventional manufacturing processes are used, then device functionality is achieved, but aperture ratio is limited
Solution Approach 1:
By forming the capacitor electrodes and transistor structures in an integrated manner, the patent reduces the space required for non-light-emitting components. The unified structure allows for more efficient use of the pixel area, increasing the aperture ratio while maintaining proper device functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and complexity by minimizing the number of masks and processes needed, while achieving high electrostatic capacity and increasing the aperture ratio for light emitting regions.
Implementation Method 1
The lower electrode may include dopant ions implanted therein.
Data Source
AI summary
A flat panel display device including a substrate including first and second regions; an active layer on the first region of the substrate including a semiconductor material; a lower electrode on the second region of the substrate including the semiconductor material; a first insulating layer on the substrate including the active layer and the lower electrode thereon; a gate electrode on the first insulating layer overlying the active layer and including a first conductive layer pattern and a second conductive layer pattern; an upper electrode on the first insulating layer overlying the lower electrode and including the first conductive layer pattern and the second conductive layer pattern; a second insulating layer on the gate electrode and the upper electrode exposing portions of the active layer and portions of the upper electrode; and a source electrode and a drain electrode connected to the exposed portions of the active layer.