Flat-Top Source/Drain Contact Structure for Low-Resistance FinFETs

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Solution Overview

Problem

In semiconductor manufacturing, FinFETs and GAA FETs face challenges in reducing contact resistance and providing appropriate stress to the channel region due to voids in wrap-around contact structures and reduced fin volume, which affects current driving capacity and device performance.

Innovation Solution

The implementation of a flat-top source/drain epitaxial layer with a conductive contact that covers the top and side faces of the fin structures, eliminating voids and increasing the fin volume to provide stress to the channel region, thereby reducing contact resistance and enhancing device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wrap-around contact structures are used to reduce contact resistance, then contact resistance is reduced, but voids are formed that reduce fin volume and stress application to the channel region

Engineering Contradiction:

Improvecontact resistanceVSAvoidfin volume

Core Design Contradiction:

ReliabilityVSVolume of stationary object

Solution Approach 1:

The contact structure is segmented into multiple parts: a bottom contact portion that wraps around the fin and a top contact portion that sits on the fin top surface. This segmentation allows the bottom portion to reduce contact resistance while the top portion fills voids and maintains fin volume integrity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The contact structure transitions from a two-dimensional wrap-around configuration to a three-dimensional structure by adding a top contact portion that extends vertically to the fin top surface, eliminating voids and preserving fin volume while maintaining low contact resistance.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If wrap-around contact structures are used to reduce contact resistance, then contact resistance is reduced, but stress application to the channel region is compromised due to voids

Engineering Contradiction:

Improvecontact resistanceVSAvoidstress to channel region

Core Design Contradiction:

ReliabilityVSStress or pressure

Solution Approach 1:

The contact structure is divided into a bottom contact portion for electrical connection and a top contact portion for stress application. This segmentation enables the top portion to apply stress to the channel region through the fin while the bottom portion maintains low contact resistance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

By extending the contact structure vertically to include a top portion on the fin surface, stress can be applied in the vertical dimension to the channel region while the bottom portion maintains electrical connection, overcoming the limitation of two-dimensional wrap-around contacts.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional contact structures are used, then manufacturing is simpler, but fin volume is reduced and device performance suffers

Engineering Contradiction:

Improvecontact structure fabricationVSAvoiddevice performance

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The contact structure is formed in a preliminary manner with both bottom and top portions integrated, ensuring fin volume is preserved before subsequent processing steps. This preliminary formation of the complete contact structure prevents performance degradation in later manufacturing steps.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The contact structure uses composite material layers including a bottom contact material for low resistance and a top contact material for stress application, combining different material properties to achieve both manufacturing feasibility and enhanced device performance.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces contact resistance and increases the stress provided to the channel region, improving the current driving capacity and overall performance of FinFETs and GAA FETs by eliminating voids and increasing the fin volume.

Implementation Method 1

A heating process is performed to reflow the first semiconductor layer

Methodology Applied

Scientific EffectReflow:

Implementation Method 2

A first semiconductor layer is formed by an epitaxial growth to fully cover the exposed source/drain region within the opening

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS11830947B2Method of manufacturing a semiconductor device and a semiconductor device

Publication Date: 2023.11.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

In a method of manufacturing a semiconductor device, an opening is formed in an interlayer dielectric layer such that a source/drain region is exposed in the opening. A first semiconductor layer is formed to fully cover the exposed source/drain region within the opening. A heating process is performed to make an upper surface of the first semiconductor layer substantially flat. A conductive contact layer is formed over the first semiconductor layer.