Flexible Display TFT Layout Using Shared Etching for Low Power
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Solution Overview
Problem
Existing display devices face challenges in achieving low power consumption, particularly in portable and wearable devices, which are essential for their efficient operation.
Innovation Solution
The display device incorporates a first thin film transistor with a polycrystalline semiconductor layer and a second thin film transistor with an oxide semiconductor layer in the active area, along with a bending area design that includes openings and signal links formed through the same process as contact holes, simplifying the manufacturing process and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a display device uses conventional thin film transistors with amorphous semiconductor layers, then the device can be manufactured with simpler processes, but the electron mobility is low and power consumption is high
Solution Approach 1:
The patent applies different semiconductor layer materials to different transistor types within the same display device. Specifically, polycrystalline silicon is used for switching transistors where high electron mobility is critical, while amorphous silicon is used for drive transistors where simpler manufacturing is acceptable. This local differentiation resolves the contradiction by optimizing each region according to its functional requirements.
Solution Approach 2:
The patent employs a composite approach by integrating multiple semiconductor layer materials (polycrystalline silicon and amorphous silicon) within the same device structure. This allows the device to benefit from both high electron mobility in switching transistors and manufacturing simplicity in drive transistors, thereby reducing overall power consumption while maintaining ease of manufacture.
2Speed
If the display device uses polycrystalline semiconductor layers for all transistors, then electron mobility is enhanced, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies polycrystalline semiconductor layers only to switching transistors where high electron mobility is essential for fast switching operations, while using amorphous semiconductor layers for drive transistors where the lower electron mobility does not significantly impact overall device performance. This localized application of polycrystalline material optimizes electron mobility where needed without unnecessarily increasing device complexity throughout the entire transistor structure.
3Ease of manufacture
If separate processes are used to form openings in the bending area and contact holes in the active area, then each feature can be optimized independently, but the manufacturing process becomes more complex and less efficient
Solution Approach 1:
The patent merges the formation processes of openings in the bending area and contact holes in the active area into a single etching step. Both feature types are formed simultaneously through the same process parameters, which simplifies manufacturing by reducing the number of process steps and improving efficiency, while maintaining consistent depth control through unified process optimization.
Solution Approach 2:
The patent creates a universal etching process that serves multiple functions: forming both openings in the bending area and contact holes in the active area. This multi-functional approach eliminates the need for separate etching processes, thereby simplifying manufacturing while ensuring that both feature types achieve consistent depth through the same process control mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electron mobility, reduces power consumption, and improves resolution while allowing the device to be flexible and durable, making it suitable for portable and wearable applications.
Implementation Method 1
a second thin film transistor having an oxide semiconductor layer in the active area, thereby realizing low power consumption
Data Source
AI summary
Disclosed is a display device that is capable of realizing low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, thereby realizing low power consumption, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified.