FlexE PHY Clock Offset Alignment for Link Capacity Adjustment

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Solution Overview

Problem

During link capacity adjustments in FlexE groups, clock offsets of PHYs can cause data loss due to misalignment, which existing technologies fail to adequately address.

Innovation Solution

A method and device that obtain the latency of PHYs within a FlexE group and align the clock offsets of all PHYs to prevent data loss during link capacity adjustments, ensuring proper synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If link capacity adjustment is performed in FlexE group, then service isolation and network sharding are achieved, but data loss occurs due to clock offsets of PHYs

Engineering Contradiction:
Improvelink capacity adjustment capabilityVSAvoiddata transmission reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent measures the latency of each PHY before link capacity adjustment, and pre-calculates the clock offset values that need to be compensated. This preliminary measurement and calculation ensures that when the actual adjustment occurs, the clock offsets are already known and can be properly compensated, preventing data loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically adjusts the clock offset parameters of PHYs based on the measured latency values. By changing the clock offset parameter according to the specific latency characteristics of each PHY, the system maintains synchronized data transmission even when link capacity is adjusted, thus preventing data loss while enabling flexible capacity changes.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If calendar configuration is performed during link capacity adjustment, then service flow routing is configured, but data loss occurs due to wrong service flow and switching order

Engineering Contradiction:
Improvecalendar configuration capabilityVSAvoiddata transmission reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent performs latency measurement and clock offset calculation before executing the calendar configuration. This preliminary preparation ensures that when service flows are routed and switching is performed, the clock synchronization is already optimized, preventing data loss due to wrong service flow routing or incorrect switching order.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the measured latency values as feedback to adjust the clock offsets of PHYs before calendar configuration takes effect. This feedback mechanism ensures that the system adapts to the actual transmission characteristics, preventing data loss during the configuration transition.

Inventive Principle:
Principle #23Feedback

3Reliability

If multiple PHYs are synchronized during link capacity adjustment, then data loss is prevented, but additional processing time and complexity are required

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidsynchronization processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent enables each PHY to self-measure its own latency and self-calculate its required clock offset compensation. This self-service approach eliminates the need for complex centralized control and coordination, reducing system complexity while still achieving reliable synchronization of all PHYs during link capacity adjustment.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent focuses on adjusting only the critical clock offset parameter of each PHY based on its measured latency, rather than reconfiguring the entire system. This targeted parameter adjustment simplifies the synchronization process while ensuring data transmission reliability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11546221B2Link capacity adjustment method and device
Publication Date: 2023.01.03 ZTE CORP
  • US11546221B2 patent drawing

AI summary

Provided are a link capacity adjustment method and device. The method includes: a node device obtains a latency of a Physical Layer (PHY) for link capacity adjustment of a Flex Ethernet (FlexE) group; and clock offsets of all the PHYs in the FlexE group are aligned according to the obtained latency. According to embodiments of the present disclosure, the clock offsets of all the PHYs in the FlexE group are aligned, thereby preventing data loss caused by the clock offsets of the PHYs in the FlexE group during link capacity adjustment.