FlexE Clock Synchronization via Payload Timestamp Sampling
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Solution Overview
Problem
The existing clock synchronization methods in Flexible Ethernet (FlexE) are limited by fixed bandwidth and format of overhead frames, restricting clock synchronization frequency and scalability, and are not compatible with conventional Ethernet standards due to unordered data block arrival sequences caused by time division multiplexing.
Innovation Solution
The method involves generating indication information to identify pre-agreed data blocks for timestamp sampling, allowing clock synchronization packets to be sent and received in non-overhead frames, thereby increasing synchronization frequency and bandwidth, and maintaining compatibility with existing standards by using client payloads and timestamp sampling similar to conventional Ethernet.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If clock synchronization packets are transmitted through the management channel of overhead frames in FlexE, then clock synchronization can be implemented, but the fixed format and bandwidth of overhead frames limit clock synchronization frequency and scalability
Solution Approach 1:
The patent extracts the clock synchronization packet transmission from the overhead frame management channel and relocates it to the client payload data blocks. This separation allows the overhead frame to maintain its fixed format while the clock synchronization packets can be transmitted with greater flexibility in the payload, thereby increasing synchronization frequency and scalability without being constrained by overhead frame limitations.
Solution Approach 2:
The patent introduces dynamic selection of data blocks for timestamp sampling through indication information. Instead of using a fixed overhead frame structure, the system dynamically identifies and uses specific data blocks within the client payload that carry clock synchronization packets, allowing flexible adaptation to different synchronization requirements and enabling higher frequencies and better scalability.
2Productivity
If data blocks are mapped by time division multiplexing layer in FlexE, then transmission rate and bandwidth are increased, but data blocks arrive at MDI in disordered sequence making timestamp sampling impossible
Solution Approach 1:
The patent introduces indication information as an intermediary that bridges the gap between disordered data block arrival and timestamp sampling requirements. The indication information carries identifiers that allow the receiving end to match incoming data blocks with their corresponding timestamps, effectively mediating the relationship between TDM-mapped disordered blocks and the ordered timestamp sampling process.
Solution Approach 2:
The patent applies preliminary action by pre-agreeing on which data blocks will be used for timestamp sampling and encoding this information in the indication data. This advance preparation allows the receiving apparatus to correctly identify and sample timestamps from the appropriate data blocks even when they arrive in disordered sequences due to TDM mapping.
3Ease of manufacture
If a data block is selected at random for timestamp sampling, then implementation is simple, but clock synchronization precision deteriorates
Solution Approach 1:
The patent changes the parameter of data block selection from random to predetermined through the use of indication information. By specifying which data blocks should be used for timestamp sampling rather than selecting them randomly, the system maintains implementation simplicity while significantly improving clock synchronization precision through consistent and controlled selection of appropriate data blocks.
Data Source
AI summary
This disclosure provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.