Flexible Active Device Array Substrate with Localized Dielectric Thickness
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Solution Overview
Problem
The manufacturing of active device array substrates with flexible plastic substrates for electro-phoretic displays faces challenges due to thermal expansion coefficient differences between plastic, glass, and inorganic dielectric layers, leading to deformation and adhesion issues during the heat process.
Innovation Solution
The active device array substrate design incorporates a thinner dielectric layer on the transparent region with a specific thickness ratio to reduce stress-induced deformation, using a flexible substrate with a gate electrode, channel layer, source and drain electrodes, and a pixel electrode, and optionally includes a metal oxide dielectric layer for enhanced adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick dielectric layer is used to provide sufficient protection, then protection capability is improved, but deformation during manufacturing process increases
Solution Approach 1:
The dielectric layer is designed with different thicknesses in different regions: a first thickness in the transistor region providing protection, and a second (thinner) thickness in the common electrode region reducing stress and deformation. This local differentiation resolves the contradiction by optimizing each region's dielectric thickness according to its specific functional requirements.
2Manufacturing precision
If the dielectric layer thickness is reduced to minimize deformation, then manufacturing precision is improved, but protection capability deteriorates
Solution Approach 1:
Different regions of the substrate receive different dielectric layer thicknesses tailored to their specific needs. The transistor region gets sufficient thickness for protection, while the common electrode region gets reduced thickness to minimize stress-induced deformation during manufacturing, thus resolving the contradiction between protection and deformation control.
3Device complexity
If a uniform dielectric layer is used, then device complexity is reduced, but stress distribution becomes uneven causing deformation
Solution Approach 1:
The dielectric layer is designed with spatially varying thickness to match the stress distribution pattern of the flexible substrate. This non-uniform structure compensates for differential thermal expansion stresses, reducing overall deformation during manufacturing while maintaining manageable device complexity.
Solution Approach 2:
The dielectric layer thickness parameter is deliberately varied across different regions of the substrate. By changing the thickness parameter from a uniform value to a spatially varying value, the patent optimizes stress distribution and reduces deformation during the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes deformation and adhesion problems, ensuring sufficient protection and improved surface roughness for the flexible substrate, reducing the risk of damage during semiconductor manufacturing processes while maintaining display quality and reducing manufacturing costs.
Implementation Method 1
the stress may be stored within the active device array substrate and the glass substrate during the heat process since the thermal expansion coefficients of the plastic, the glass, and even the inorganic dielectric layer exist huge differences
Data Source
AI summary
An active device array substrate includes a flexible substrate, a gate electrode, a dielectric layer, a channel layer, a source electrode, a drain electrode, and a pixel electrode. The flexible substrate has a transistor region and a transparent region adjacent to each other. The gate electrode is disposed on the transistor region. The dielectric layer covers the flexible substrate and the gate electrode. A portion of the dielectric layer disposed on the gate electrode has a first thickness. Another portion of the dielectric layer disposed on the transparent region has a second thickness less than the first thickness. The channel layer is disposed above the gate electrode. The source electrode and the drain electrode are electrically connected to the channel layer. The pixel electrode is disposed on the dielectric layer which is disposed on the transparent region. The pixel electrode is electrically connected to the drain electrode.