Flexible ADC Reference-Level Control for Low-Voltage CMRR

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Solution Overview

Problem

Analog-to-digital converters (ADCs) face challenges in achieving flexibility in input range due to the requirement for high common-mode rejection ratio (CMRR), which is difficult to obtain, especially with decreasing supply voltages in newer fabrication processes, limiting their ability to handle varying common-mode voltages and currents effectively.

Innovation Solution

The ADC incorporates a first and second range-control unit to generate control values for the input range size and midpoint, respectively, along with a reference-level unit to produce reference levels, allowing for adjustable input ranges and reducing common-mode variations, thereby relaxing the CMRR requirements on internal components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the ADC uses known circuit topologies with good CMRR, then the common-mode rejection ratio is improved, but the supply voltage requirement increases beyond what is allowed by newer fabrication processes

Engineering Contradiction:
Improvecommon-mode rejection ratioVSAvoidsupply voltage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic range control by making the reference levels adjustable through digital control interfaces. The first range-control unit adjusts the spread of reference levels to match the input signal range, while the second range-control unit adjusts the midpoint of the reference levels to match the common-mode voltage of the input signal. This dynamic adaptability allows the ADC to maintain good CMRR performance across varying common-mode voltages without requiring high supply voltage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the reference levels (their spread and midpoint) based on the input signal characteristics. By digitally controlling the reference level positions to match the input signal range and common-mode voltage, the system adapts to different operating conditions, achieving good CMRR performance with lower supply voltage requirements compatible with newer fabrication processes.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the ADC is designed with adjustable input range for flexibility, then the adaptability is improved, but the common-mode rejection ratio becomes difficult to maintain

Engineering Contradiction:
Improveinput range adjustabilityVSAvoidcommon-mode rejection ratio
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent uses digital control interfaces that allow the reference levels to be adjusted based on the desired input range and common-mode voltage. The range-control units digitally program the reference level positions, creating a feedback mechanism where the reference levels adapt to match the input signal characteristics, thereby maintaining good CMRR even with adjustable input range.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The reference levels are made dynamically adjustable through digital control, allowing the ADC to adapt its reference level spread and midpoint to match the input signal range and common-mode voltage. This dynamic adjustment maintains optimal CMRR performance across different operating conditions while providing flexible input range adjustment.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If the supply voltage is decreased to match newer fabrication processes, then the manufacturing compatibility is improved, but the ability to achieve high CMRR becomes difficult

Engineering Contradiction:
Improvefabrication process compatibilityVSAvoidcommon-mode rejection ratio
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the reference level parameters (spread and midpoint) to adapt to lower supply voltage conditions. By digitally controlling the reference levels to match the input signal characteristics, the system achieves good CMRR performance with reduced supply voltage, making it compatible with newer fabrication processes that have lower voltage requirements.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The ADC implements dynamic reference level adjustment that allows it to maintain good CMRR performance across varying supply voltage conditions. This adaptability enables the converter to work effectively with lower supply voltages required by newer fabrication processes while still achieving the necessary common-mode rejection ratio.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7830291B2Flexible analog-to-digital converter
Publication Date: 2010.11.09 QUALCOMM INC
  • US7830291B2 patent drawing
  • US7830291B2 patent drawing
  • US7830291B2 patent drawing

AI summary

An analog-to-digital converter (1). The analog to digital converter (1) comprises a first range-control unit (100) adapted to generate a first range-control value for controlling a size of an input range of the analog-to-digital converter (1). The analog to digital converter further comprises a second range-control unit (200) adapted to generate a second range-control value for controlling a midpoint of the input range. Further, the analog-to-digital converter (1) comprises a reference-level unit (300) operatively connected to the first range-control unit (100) and the second range-control unit (200). The reference-level unit (300) is arranged to generate a plurality of reference levels at least based on the first and the second range-control value. The analog-to-digital converter further comprises a comparison unit (400) operatively connected to the second range-control unit (200) and the reference-level unit (300). The comparison unit (400) is arranged to perform at least one comparison between a difference between an analog input value of the analog-to-digital converter (1) and the second range-control value and individual reference levels of the plurality of reference levels. The comparison unit (400) is further arranged to generate a digital output value of the analog-to-digital converter (1) based on the at least one comparison.