Flexible AMOLED Buffer Layer Segmentation for Stress Management
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Solution Overview
Problem
The current flexible AMOLED fabrication process is complex and costly due to the need for multiple exposure processes and expensive masks, which complicates the improvement of stress and flexibility in bending regions.
Innovation Solution
A display panel design featuring a substrate with distinct buffer layers in display and bending regions, including a thin-film transistor structure and a planarization layer that fills via holes, simplifying the manufacturing process and using organic materials to enhance flexibility and reduce stress in bending regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple exposure processes and masks are used to improve stress and flexibility in bending regions, then the stress and flexibility are improved, but the manufacturing complexity and cost increase
Solution Approach 1:
The patent divides the buffer layer into two distinct segments: a first buffer layer in the display region and a second buffer layer in the bending region. This segmentation allows each buffer layer to be optimized for its specific functional requirements, eliminating the need for complex post-processing exposure steps while maintaining both stress management and flexibility where needed.
Solution Approach 2:
The patent applies different material properties to different regions: the first buffer layer in the display region uses materials with specific stress characteristics, while the second buffer layer in the bending region uses materials optimized for flexibility. This local differentiation achieves region-specific performance optimization without requiring complex manufacturing processes.
2Reliability
If multiple exposure processes and masks are used to improve stress and flexibility in bending regions, then the stress and flexibility are improved, but the manufacturing cost increases
Solution Approach 1:
By segmenting the buffer layer into region-specific first and second buffer layers, the patent enables direct fabrication without requiring multiple expensive mask-based exposure processes. Each buffer layer can be formed in a single fabrication step, significantly reducing material and process costs.
Solution Approach 2:
The patent incorporates the stress management and flexibility requirements directly into the buffer layer design and fabrication process from the beginning. By pre-configuring the appropriate buffer layer materials in their respective regions during initial manufacturing, the need for costly subsequent mask-based modification steps is eliminated.
3Adaptability or versatility
If inorganic film is etched and filled with PI material to improve flexibility, then the flexibility is improved, but the manufacturing process becomes more complicated
Solution Approach 1:
The patent applies a second buffer layer with superior flexibility properties specifically in the bending region, while the display region maintains its original buffer layer configuration. This localized material optimization provides flexibility where needed without requiring complex etching and refilling operations across the entire device.
Solution Approach 2:
The flexible second buffer layer is incorporated into the device structure during the initial fabrication process rather than requiring subsequent etching and material deposition steps. This preliminary configuration of region-specific buffer layers simplifies the overall fabrication process while achieving the desired flexibility.
Data Source
AI summary
A display panel is provided. The display panel includes: a substrate having a display region and a bending region; a buffer layer having a first buffer layer disposed in the display region and a second buffer layer disposed in the bending region; a thin-film transistor disposed on the first buffer layer; an insulated combination layer disposed in the second buffer layer, a via hole is provided in the insulated combination layer and the second buffer layer; and a planarization layer disposed on the thin-film transistor and the insulated combination layer, and the planarization layer fills the via hole. A manufacturing method for a display panel is also disclosed. The present invention adopts an organic flat layer to fill the via hole, which can simplify the process flow and reduce the production cost while ensuring the flexibility of the bending region.