Flexible Board Wiring Width Variation for Display Connection Strength

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Solution Overview

Problem

The finer processing technology for semiconductor chips on flexible boards in display devices makes it difficult to prevent electrical failures in connection portions while maintaining mechanical strength, as the wiring on flexible boards becomes more delicate and prone to mechanical stress.

Innovation Solution

A display device design featuring a thin film transistor substrate with terminals connected to a flexible board, where the wiring includes a narrower first portion overlapping the terminals and a wider second portion between the first and semiconductor chip, with an additional third portion that gradually increases in width to alleviate stress and enhance mechanical strength, ensuring secure connections and mechanical stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If finer processing technology is used for semiconductor chips on flexible boards, then manufacturing precision is improved, but reliability deteriorates due to increased susceptibility to electrical failures and mechanical stress

Engineering Contradiction:
Improvewiring finenessVSAvoidconnection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies local quality by creating different wiring widths in different regions: a narrower first wiring portion (0.03-0.06mm) in the terminal overlap region for precision connection, and a wider second wiring portion (0.06-0.10mm) in the non-overlap region for mechanical strength. This localized variation in wiring dimensions optimizes both connection precision and overall reliability.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If wiring on flexible board is made narrower to achieve finer processing, then manufacturing precision is improved, but strength deteriorates making the wiring more prone to mechanical failure

Engineering Contradiction:
Improvewiring dimension precisionVSAvoidwiring mechanical strength
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent implements local quality by varying the wiring width according to functional requirements: the first wiring portion overlapping terminals uses narrower dimensions (0.03-0.06mm) for precise alignment and connection, while the second wiring portion extends to wider dimensions (0.06-0.10mm) to provide adequate mechanical strength and stress distribution.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies dynamics by creating a gradual transition in wiring width from the narrow first portion to the wider second portion. This dynamic variation in cross-section allows the wiring to adapt to different functional demands along its length, optimizing both precision and strength.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8902394B2Display device comprising a flexible board including a first wiring portion that is narrower than a second wiring portion and wherein the second wiring portion does not overlap a terminal portion
Publication Date: 2014.12.02 PANASONIC INTELLECTUAL PROPERTY CORP OF AMERICA
  • US8902394B2 patent drawing
  • US8902394B2 patent drawing
  • US8902394B2 patent drawing

AI summary

Provided is a display device, including: a display panel which includes a thin film transistor substrate (SUB1) on which a terminal portion including a plurality of terminals (TR) is provided; and a drive circuit connected to the terminal portion, in which: the drive circuit includes: a flexible board (FB); and a semiconductor chip mounted on the flexible board; the flexible board (FB) includes a plurality of wirings (La) for connecting the semiconductor chip and the plurality of terminals (TR), respectively; and the plurality of wirings (La) each include: a first wiring portion (La1) which overlaps a corresponding one of the plurality of terminals (TR); and a second wiring portion (La2) which is positioned between the first wiring portion (La1) and the semiconductor chip, the first wiring portion (La1) being narrower than the second wiring portion (La2).