Flexible Substrate Chip With Grid-Shaped Power Rails
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Solution Overview
Problem
Chips with flexible substrates face cracking issues when equipped with multilayer metal wiring, leading to reduced transistor density and increased manufacturing costs due to fewer metal wiring layers.
Innovation Solution
A chip design featuring a flexible substrate with a multilayer metal wiring structure in a grid shape, including thin-film transistors, a redistribution layer, and power rail layers, which increases transistor density and reduces manufacturing costs while preventing cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multilayer metal wiring structure is provided in the chip, then the transistor density increases, but the chip is prone to cracking during repeated bending
Solution Approach 1:
The power rail layer is divided into a grid-shaped pattern consisting of multiple segmented metal wiring portions. These segments are arranged in a matrix formation with spacing between them, allowing the structure to flex without continuous stress concentration. This segmentation enables the chip to maintain high transistor density while reducing cracking risk during bending operations.
Solution Approach 2:
The patent employs a flexible substrate as the base layer, which inherently provides bending capability. The metal wiring structure is deposited as thin film layers on this flexible substrate, allowing the entire assembly to flex without rigid stress concentration points. This combination of flexible substrate and thin film metal wiring resolves the contradiction between high density and cracking resistance.
2Reliability
If fewer layers of metal wirings are used to avoid cracking, then the chip reliability improves, but the transistor density decreases and manufacturing cost increases
Solution Approach 1:
By segmenting the power rail layer into a grid pattern, the patent achieves reliable cracking resistance with a single power rail layer while maintaining high transistor density. The segmented structure distributes mechanical stress, eliminating the need for multiple continuous metal wiring layers that would otherwise be required for both density and reliability.
3Productivity
If a multilayer metal wiring structure is used, then the transistor density increases, but the manufacturing cost increases
Solution Approach 1:
The grid-shaped segmented power rail layer can be manufactured using standard photolithography and metal deposition techniques in a single process layer. This segmentation approach achieves high transistor density without requiring multiple complex metal wiring layers, thereby reducing manufacturing steps and costs while maintaining high density.
Data Source
AI summary
A chip is provided. The chip includes a flexible substrate, a plurality of thin-film transistors, a redistribution layer, a first power rail layer, and a second power rail layer. The plurality of thin-film transistors are disposed on the flexible substrate. The redistribution layer is disposed above the plurality of thin-film transistors. The first power rail layer is disposed above the redistribution layer. The first power rail layer provides a first voltage to the plurality of thin-film transistors. The second power rail layer is disposed above the first power rail layer. The second power rail layer provides a second voltage to the plurality of thin-film transistors, wherein the second power rail layer is disposed in a grid shape.