Flexible Circuit Board Plating for Bonding Reliability
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Solution Overview
Problem
Existing flexible circuit boards face challenges in securely bonding semiconductor and passive elements using different mounting methods, which can lead to bonding defects and reduced operational reliability.
Innovation Solution
A flexible circuit board design with distinct mounting areas for semiconductor and passive elements, featuring wiring patterns with specific plating layers and a protective layer to ensure secure bonding through reflow processes and flip-chip bonding, utilizing pure metal and copper-metal alloy layers to enhance connection reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate bonding means such as solder are used for passive elements, then passive elements can be mounted on the flexible circuit board, but bonding defects may occur and operational reliability is reduced
Solution Approach 1:
The patent applies different plating layer configurations to different mounting areas: the first terminal parts (for passive elements) have no plating layer to enable solder bonding, while the second terminal parts (for semiconductor elements) have a pure metal plating layer for flip-chip bonding. This local differentiation resolves the contradiction by optimizing each mounting area for its specific bonding method, improving reliability without excessive overall complexity.
Solution Approach 2:
The flexible circuit board is segmented into distinct mounting areas with different plating configurations. The wiring patterns are divided into first terminal parts and second terminal parts, each with specialized plating layer structures. This segmentation allows each area to be optimized for its specific bonding method (solder vs. flip-chip), resolving the reliability issue while maintaining manageable manufacturing complexity.
2Strength
If a plating layer is formed on all terminal parts, then bonding strength is improved, but bonding defects occur due to incompatible bonding methods
Solution Approach 1:
Instead of applying plating uniformly across all terminals, the patent uses local quality by forming plating layers only where needed: the second terminal parts have pure metal plating for strong flip-chip bonding, while the first terminal parts remain unplated for proper solder bonding. This selective approach ensures each bonding method achieves optimal strength and reliability for its specific application.
Solution Approach 2:
The patent inverts the conventional approach by not applying plating to the first terminal parts intended for solder bonding, while applying plating to the second terminal parts for flip-chip bonding. This inversion resolves the contradiction by recognizing that different bonding methods require opposite plating strategies: solder bonding works best without plating interference, while flip-chip bonding requires pure metal plating for optimal contact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides secure bonding of semiconductor and passive elements, reducing the likelihood of defects and improving the operational reliability of the flexible circuit board by using distinct mounting methods and plating layers.
Implementation Method 1
a first plating layer which includes a pure metal plating layer, is formed on the second terminal parts
Implementation Method 2
mounting a first element on the first terminal parts via a reflow process
Data Source
AI summary
The present invention comprises: a base film on which a first element mounting part and a second element mounting part are defined; wiring patterns formed by extending from each of the first element mounting part and the second element mounting part on the base film, wherein the wiring patterns include a first terminal part in the first element mounting part and a second terminal part in the second element mounting part; and a first plating layer formed on the second terminal part, wherein the first plating layer includes a pure metal plating layer, and the first plating layer is not formed on the first terminal part.