Flexible Column Repair Circuit Fuse Array Optimization
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Solution Overview
Problem
The existing semiconductor memory devices face challenges in efficiently managing failed memory cells due to the increasing complexity of manufacturing processes, leading to a need for flexible column repair mechanisms and reduced size of the fuse array for storing failed addresses.
Innovation Solution
A memory device with a flexible column repair circuit that shares and reuses a part of the fuse array to minimize its size, allowing for efficient repair of failed columns by mapping source addresses to destination addresses and replacing failed columns with redundancy columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large number of fuses are used to store fail addresses, then the repair capability is improved, but the fuse array size increases and available space decreases
Solution Approach 1:
The fuse array is designed to serve multiple functions: storing both normal repair addresses and source-destination repair information. By enabling the same fuse array to handle different types of repair operations (traditional repair and source-destination repair), the patent reduces the need for separate storage structures, thereby minimizing fuse array space while maintaining comprehensive repair capability
Solution Approach 2:
The patent combines the storage of normal repair addresses and source-destination repair mappings in a single fuse array structure. Instead of using separate arrays for different repair types, the invention merges these functions into one unified storage mechanism, reducing overall space requirements while preserving full repair functionality
2Ease of manufacture
If traditional repair methods are used, then the implementation is simple, but the fuse array size becomes insufficient for large capacity DRAM
Solution Approach 1:
The repair circuit is designed with dynamic address mapping capability that can adapt to different repair scenarios. The source-destination repair mechanism dynamically determines whether to use normal repair or source-destination repair based on the fail address pattern, allowing the system to efficiently manage limited fuse array space while maintaining implementation feasibility
Solution Approach 2:
The column address space is segmented into multiple segments, with each segment having its own repair circuit. This segmentation allows the repair function to be distributed and managed in smaller units, making the overall system more manageable while reducing the burden on any single fuse array portion
3Area of stationary object
If the number of fuses is reduced to minimize fuse array size, then the available space increases, but the repair capability may be compromised
Solution Approach 1:
The patent changes the organizational parameters of the fuse array by implementing source-destination repair with segmented address mapping. This parameter change allows the same number of fuses to provide enhanced repair capability by organizing the repair information differently, thereby maintaining or improving repair capability while minimizing fuse array size
Data Source
AI summary
A memory device includes a memory cell array having a plurality of memory cells therein that span a plurality of rows, which are grouped into segments, and a plurality of columns, which are grouped into ticks. The ticks include normal ticks, and a spare tick that spans at least one redundancy column of memory cells in the memory cell array. A repair circuit is provided, which is configured to: (i) repair a first source address of a first failed column, which spans a plurality of the segments, with a first destination address of a pass column in one of the normal ticks, and then (ii) further repair the first destination address of the pass column with a first redundancy column within the spare tick that corresponds to the first destination address.