Flexible Display Edge Burn-in Mitigation via Grounded Conductive Pattern

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Solution Overview

Problem

Flexible display apparatuses based on polyimide substrates face issues with edge burn-in and driving failure, particularly in the gate-in-panel (GIP) unit, due to charge accumulation and voltage drops.

Innovation Solution

A conductive pattern is formed in the edge area of the display panel to offset positive charges, and a groove with a filling layer is created below the GIP transistor to suppress charge accumulation and voltage drops, improving the reliability of the driving circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a flexible display apparatus uses a polyimide substrate to enable rolling functionality, then adaptability and versatility are improved, but edge burn-in and driving failure occur due to charge accumulation

Engineering Contradiction:
Improverolling functionalityVSAvoidedge burn-in and driving failure
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A conductive pattern is introduced as an intermediary element between the polyimide substrate and the external environment. This conductive pattern acts as a charge reservoir that captures and neutralizes positive charges accumulating at the substrate edges, preventing edge burn-in while maintaining the flexible rolling functionality of the display apparatus

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful positive charges that accumulate at the substrate edges are extracted from the polyimide substrate by the conductive pattern. By removing these charges from the substrate edge region, the source of edge burn-in and driving failure is eliminated, allowing the flexible display to operate reliably

Inventive Principle:
Principle #2Taking out (Extraction)

2Device complexity

If the gate-in-panel (GIP) unit is integrated into the flexible substrate to reduce device complexity, then device complexity is reduced, but charge accumulation and voltage drops occur in the GIP region

Engineering Contradiction:
ImproveGIP integrationVSAvoidcharge accumulation and voltage drops
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

A filling layer is introduced as an intermediary structure beneath the GIP transistor. This filling layer modifies the electrical environment in the GIP region, preventing charge accumulation and stabilizing voltage thresholds, thereby maintaining the benefits of GIP integration while eliminating its harmful effects

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces edge burn-in and enhances the reliability of the driving circuit by offsetting positive charges and stabilizing voltage thresholds, thereby improving the overall performance of the flexible display apparatus.

Implementation Method 1

a conductive pattern which is disposed below the substrate and is disposed in an edge area of the display area and the non-display area and which is grounded

Methodology Applied
Scientific EffectElectrostatic induction: Electrostatic Induction

Implementation Method 2

a barrier film which is disposed below the substrate and the conductive pattern

Methodology Applied
Scientific EffectCharge blocking: Diffusion Barrier

Data Source

PatentUS20220068169A1Display apparatus
Publication Date: 2022.03.03 LG DISPLAY CO LTD
  • US20220068169A1 patent drawing
  • US20220068169A1 patent drawing
  • US20220068169A1 patent drawing

AI summary

According to an exemplary embodiment of the present disclosure, a display apparatus includes a display panel which is divided into a display area and a non-display area and includes a substrate, a pixel unit transistor which is disposed above the substrate and provided in the display area and a gate in panel (GIP) transistor which is provided in the non-display area, a conductive pattern which is disposed below the substrate and is disposed in an edge area of the display area and the non-display area and which is grounded and a barrier film which is disposed below the substrate and the conductive pattern. By doing this, an edge burn-in due to the polarization may be improved.