Flexible Display Panel Layout With Single-Mask TFT Fabrication
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Solution Overview
Problem
Current display panel manufacturing processes face challenges in achieving high speed and reliability, particularly in flexible display designs, where the complexity of thin-film transistor structures and the number of masks used in the manufacturing process can lead to inefficiencies and increased costs.
Innovation Solution
The proposed solution involves a display panel design with a base layer having a first and second area, where the second area is bent, featuring inorganic layers, thin-film transistors with silicon and oxide semiconductor patterns, and a simplified manufacturing method that reduces the number of masks by forming insulation layers and organic layers in a continuous process, allowing for increased flexibility and reduced manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional manufacturing processes are used with multiple masks, then manufacturing precision can be maintained, but device complexity and manufacturing time increase
Solution Approach 1:
The patent combines multiple mask alignment steps into a single mask process. The mask layer is formed once and serves multiple purposes: defining the semiconductor pattern, the insulating layer pattern, and the conductive layer pattern. This merging of functions reduces the number of masks from three or more to one, thereby reducing device complexity while maintaining manufacturing precision through the unified design approach
Solution Approach 2:
The single mask layer performs multiple functions simultaneously: it defines the semiconductor region, the insulating layer region, and the conductive layer region. This multi-functionality eliminates the need for separate masks for each layer, reducing manufacturing complexity while maintaining the precision required for each individual pattern
2Manufacturing precision
If traditional manufacturing processes with multiple masks are used, then manufacturing precision can be maintained, but manufacturing time increases
Solution Approach 1:
The patent merges multiple sequential mask alignment and deposition steps into a single integrated process. Instead of applying three or more masks sequentially, the invention uses one mask layer that defines all necessary patterns, thereby reducing manufacturing time while maintaining precision through the unified pattern definition approach
Solution Approach 2:
The mask layer is designed and formed in advance to encompass all subsequent pattern definitions. This preliminary action allows all semiconductor, insulating, and conductive patterns to be defined in a single step, eliminating the need for multiple sequential mask operations and significantly reducing manufacturing time
3Adaptability or versatility
If flexible display design is implemented, then adaptability increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies the same simplified single-mask methodology to flexible display manufacturing, where it becomes even more valuable. The unified pattern definition approach reduces the complexity of forming thin-film transistors on flexible substrates, enabling adaptable flexible display designs without proportionally increasing manufacturing complexity
Data Source
AI summary
A display panel includes a base layer including a first area and a second area. At least one inorganic layer disposed on the base layer overlaps the first area and the second area. The at least one inorganic layer comprises a lower opening. A first thin-film transistor is disposed on the at least one inorganic layer. The first thin-film transistor includes a silicon semiconductor pattern. A second thin-film transistor is disposed on the at least one inorganic layer. The second thin-film transistor includes an oxide semiconductor pattern. A plurality of insulation layers overlap the first area and the second area. An upper opening extends from the lower opening. A signal line is electrically connected to the second thin-film transistor. An organic layer is disposed in the lower opening and the upper opening. A light emitting element is disposed on the organic layer.