Flexible Encapsulation Layer for Semiconductor Connectivity
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Solution Overview
Problem
Flexible electronic devices face challenges in achieving both flexibility and reliable electrical connectivity due to the limitations of rigid circuit boards and hand wiring, particularly in terms of space savings and production constraints, which existing technologies have not adequately addressed.
Innovation Solution
The manufacturing method involves forming a semiconductor layer on a substrate, followed by an insulating and metal layer, patterning these layers, and then encapsulating them with a flexible layer having a Young's modulus less than 40 GPa, which allows for the creation of openings for electrical connections, ensuring the flexibility and structural integrity of the electronic device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If rigid circuit boards or hand wiring are used, then electrical connectivity is reliable, but flexibility and space savings are limited
Solution Approach 1:
The patent replaces rigid circuit boards with a flexible substrate and uses a flexible encapsulation layer (Young's modulus less than 40 GPa) to cover the semiconductor layers and metal interconnects. This flexible structure maintains electrical connectivity through the metal layers while enabling the device to be bent or conform to curved surfaces, thus resolving the contradiction between reliable electrical connectivity and flexibility.
2Reliability
If rigid circuit boards or hand wiring are used, then electrical connectivity is reliable, but space savings are limited
Solution Approach 1:
The patent transitions from planar circuit board layouts to a vertically stacked architecture where semiconductor layers and metal interconnects are arranged in multiple layers above the flexible substrate. This three-dimensional arrangement reduces the footprint area while maintaining reliable electrical connectivity through the vertical stacking of functional layers.
3Manufacturing precision
If multiple photo engraving processes are performed, then manufacturing precision is improved, but manufacturing time and cost increase
Solution Approach 1:
The patent combines the patterning of multiple layers (semiconductor layer, insulating layer, and metal layer) into a single photo engraving process. By applying a photoresist layer and performing one patterning step, all three layers are patterned simultaneously to form corresponding patterns, eliminating the need for multiple sequential photo engraving processes and significantly improving manufacturing efficiency while maintaining precision.
Data Source
AI summary
An electronic device including at least one electronic component and a method of manufacturing the same are provided. The electronic device may include a substrate, a semiconductor layer disposed on the substrate, an insulating layer disposed on the semiconductor layer, and a first metal layer disposed on the insulating layer. The insulating layer may have a pattern corresponding to a pattern of the semiconductor layer or the first metal layer. The flexible layer has a Young's modulus less than 40 GPa and is disposed on the substrate to encapsulate the semiconductor layer. At least one first opening penetrates the flexible layer. At least one second metal layer is disposed on the flexible layer and in the first opening and electrically connected to the semiconductor layer.