Flexible Interposer for Stacked Semiconductor Chips
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor devices with vertically stacked chips face challenges in achieving high input/output density, flexibility in choosing chip sizes, reliability due to stress on contact joints, and reduced package thickness, especially with high-aspect ratio metal posts that are costly and prone to failure in temperature testing.
Innovation Solution
Employing a flexible insulating interposer with conductive vias and traces, made of polyimide, that allows for the assembly and connection of semiconductor chips with metal studs and anisotropic conductive films, enabling a higher pin count and reduced stress through convex and concave bending for attachment to a substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-aspect ratio metal posts are used to connect stacked chips to substrate, then electrical connections are established, but reliability deteriorates due to cracks in contact joints during temperature cycle testing and high temperature operation
Solution Approach 1:
The patent employs a flexible interposer with a thin film structure (thickness less than the combined thickness of the chips) that can bend and deform to accommodate thermal expansion differences between chips and substrate. This flexibility absorbs stress that would otherwise concentrate on rigid contact joints, preventing crack formation during temperature cycling and high temperature operation.
Solution Approach 2:
The flexible interposer acts as an intermediary layer between the stacked chips and the substrate. It provides a compliant connection interface that mediates the mechanical and thermal stresses between the rigid chip stack and the substrate, distributing loads and preventing direct stress concentration at the contact joints.
2Reliability
If high-aspect ratio metal posts are used for connections, then electrical connectivity is achieved, but device complexity increases due to difficult formation processes and high costs
Solution Approach 1:
The patent replaces the complex mechanical formation process of high-aspect ratio metal posts with a simpler flexible interposer structure. The interposer can be manufactured using standard thin film deposition and patterning techniques, avoiding the difficult and expensive processes required to create and fill high-aspect ratio vias with metal.
3Reliability
If high-aspect ratio metal posts are used, then connections are established, but productivity decreases due to limited number of connections per unit area on the target surface
Solution Approach 1:
The flexible interposer transitions the connection interface from a vertical high-aspect ratio geometry to a planar thin film geometry. This dimensional change allows multiple connection points to be distributed across the surface area of the interposer, significantly increasing the number of connections per unit area while maintaining connection stability through the flexible substrate.
Data Source
AI summary
A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 μm thick, has conductive traces (121), a central planar rectangular area and on each side of the rectangle a wing bent at an angle from the central plane. The central area has metal studs (122, 123) on the top and the bottom surface, which match the terminals of the chips, further conductive vias of a pitch center-to-center about 50 μm or less. The side wings have contact pads (130) with metallic connectors (131) on the bottom surface; the connectors may be solder balls, metal studs, or anisotropic conductive films. The second chip is adhesively attached to a substrate, whereby the interposer faces away from the substrate. The interposer side wings have a convex bending (150) downwardly along the second chip and a concave bending (151) over the substrate; the side wing connectors are attached to the matching substrate sites.