Flexible Memory Layout With Direct and Cross Access Paths

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Solution Overview

Problem

Existing memory systems struggle to efficiently manage diverse memory requirements of different processing units with varying performance characteristics, leading to suboptimal performance and resource allocation.

Innovation Solution

Implementing a unified memory system with direct and cross connections between memory clients and sections, allowing for high-performance access to associated memory sections and flexible access to all sections, while maintaining a single contiguous physical address space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a unified memory system with direct and cross connections is implemented, then memory access performance is improved, but device complexity increases

Engineering Contradiction:
Improvememory access performanceVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The memory system is segmented into multiple memory sections (first memory section, second memory section, etc.) that can be independently accessed. Each memory section can be coupled to one or more memory clients through direct connections or cross connections, allowing parallel access operations and improving overall memory access performance while distributing system complexity across modular components

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a dimensional aspect to memory access by implementing both direct connections (within same memory section) and cross connections (between different memory sections). This creates a multi-dimensional access topology where memory clients can access memory through different pathways, enhancing performance while managing complexity through structured connection patterns

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple memory clients access different memory sections with varying performance characteristics, then resource allocation efficiency is improved, but system complexity increases

Engineering Contradiction:
Improveresource allocation efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Different memory sections are assigned different performance characteristics tailored to specific memory clients' needs. Each memory section can have optimized access times, bandwidth, or capacity suited to its associated memory client's requirements, improving resource allocation efficiency while maintaining manageable system complexity through localized optimization rather than global redesign

Inventive Principle:
Principle #3Local quality

3Speed

If direct memory connections are used for high-performance access, then access speed is improved, but flexibility in accessing all memory sections is reduced

Engineering Contradiction:
Improveaccess speedVSAvoidflexibility in accessing memory sections
Core Design Contradiction:
SpeedVSAdaptability or versatility

Solution Approach 1:

The memory system implements a universal access architecture where memory clients can access any memory section through either direct connections (for high-speed access to associated sections) or cross connections (for flexible access to all sections). This multi-functional connection structure allows the system to provide both high-performance dedicated access and flexible universal access, resolving the contradiction between speed and adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12596479B2Flexible memory system
Publication Date: 2026.04.07 ADVANCED MICRO DEVICES INC
  • US12596479B2 patent drawing
  • US12596479B2 patent drawing
  • US12596479B2 patent drawing

AI summary

A technique for operating a memory system is disclosed. The technique includes performing a first request, by a first memory client, to access data at a first memory address, wherein the first memory address refers to data in a first memory section that is coupled to the first memory client via a direct memory connection; servicing the first request via the direct memory connection; performing a second request, by the first client, to access data at a second memory address, wherein the second memory address refers to data in a second memory section that is coupled to the first client via a cross connection; and servicing the second request via the cross connection.