Flexible Multilayer LED Substrate via Hole Segmentation
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Solution Overview
Problem
Conventional via hole manufacturing techniques in printed circuit boards are inadequate for high-density chip designs, such as RGB LED backlight chips, as they struggle to form sufficiently small holes, limiting the size of the substrate and hindering the miniaturization of electronic components.
Innovation Solution
A flexible multilayer construction with electrically conductive top and bottom pads connected by vias is used, where the substrate is patterned with cutting lines to divide the pads and conductive paths into sections, allowing for the creation of smaller, isolated via holes that can be cut to form a fraction of the original size, enabling higher density chip designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional drilling techniques are used to form via holes, then the manufacturing process is simple and reliable, but the via hole size cannot be sufficiently small for high-density chip designs
Solution Approach 1:
The patent divides the substrate into multiple layers with conductive paths formed through sequential lamination of patterned metal foils and dielectric layers. This segmentation allows conductive vias to be created as part of the layered structure rather than requiring single-step drilling, enabling smaller effective via dimensions while maintaining manufacturing feasibility through standard lamination processes.
2Productivity
If the substrate size is reduced to enable higher density chips, then the chip density increases, but the via hole size becomes too small for conventional manufacturing
Solution Approach 1:
The patent transitions from a single-layer substrate to a multilayer construction where conductive paths extend through multiple dielectric layers. This dimensional expansion allows the electrical connection to be distributed across multiple layers, effectively reducing the required via hole size in any single layer while maintaining overall connectivity for high-density chip designs.
3Manufacturing precision
If mechanical and punched drills are used to form holes, then the manufacturing process is straightforward, but they cannot form sufficiently small holes for high-density applications
Solution Approach 1:
The patent replaces mechanical drilling with a lamination-based fabrication process where conductive paths are formed by bonding patterned metal foils to dielectric layers under heat and pressure. This substitution eliminates the need for mechanical hole formation, enabling much smaller effective via dimensions while using standard materials processing techniques rather than precision mechanical drilling.
Data Source
AI summary
A flexible multilayer construction (1000) for mounting a plurality of light emitting semiconductor devices (LESDs 100, 110, 120) includes a flexible dielectric substrate (200) comprising top (210) and bottom (220) major surfaces, and pluralities of corresponding electrically conductive top (300, 310, 320, 330) and bottom (500, 510, 520, 530) pads disposed on the top and bottom major surfaces, respectively. An electrically conductive via (400, 410, 420, 430) connects each pair of corresponding top and bottom pads, a side of each top pad partially overlapping a side of the corresponding bottom pad and a side of the substrate, such that in a plan view, each top pad fully overlaps the corresponding bottom pad.