Flexible OLED Bezel Shortening via Layered Signal Routing
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Solution Overview
Problem
The existing flexible OLED substrates have a wide bezel due to the layout of power and data signals in a single metallic layer, which limits the ability to shorten the bezel effectively.
Innovation Solution
A flexible OLED device with a substrate featuring a buffer layer, inorganic layer, gate insulating layers, inter-layer dielectric layer, passivation layer, and a driving transistor with data and driving voltage leads arranged in different layers within the inactive area, allowing for a more efficient layout that omits unnecessary space and shortens the bezel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If power signal and data signal are laid out in the same metallic layer, then the layout is simple, but the bezel width increases
Solution Approach 1:
The patent applies dimensionality change by moving the data signal layout from the same plane as power signals to a different metallic layer. Specifically, power signals are routed in the first metallic layer while data signals are routed in the second metallic layer, utilizing the vertical dimension (layer stacking) to resolve the spatial conflict. This layered approach allows both signal types to coexist without increasing bezel width, transforming a 2D layout problem into a 3D solution.
2Adaptability or versatility
If flexible OLED substrate is designed with circular arc bend, then portability is improved, but the bezel area increases due to signal layout requirements
Solution Approach 1:
The patent resolves the bezel area expansion issue by utilizing vertical layering for signal routing. Data signals are confined to the second metallic layer while power signals remain in the first layer, allowing the bendable substrate to maintain a compact circular arc design without requiring excessive horizontal space for signal accommodation. This reduces the overall bezel area while preserving flexibility and portability.
Solution Approach 2:
The patent segments the signal routing function across different metallic layers. By separating power signal routing (first metallic layer) from data signal routing (second metallic layer), the design allows independent optimization of each signal path. This segmentation enables more efficient space utilization in the bendable substrate, reducing the bezel area required for signal accommodation while maintaining full functionality.
3Area of stationary object
If data voltage lead is arranged on ILD layer in inactive area, then space utilization is improved, but manufacturing complexity increases
Solution Approach 1:
The patent utilizes the vertical dimension by routing the data voltage lead through the ILD layer (inter-layer dielectric) in the inactive area, rather than confining all leads to the same metallic layer. This three-dimensional routing approach optimizes space utilization by using available vertical pathways, allowing data signals to reach their destinations without increasing bezel dimensions, while the added manufacturing complexity is managed through standard multi-layer fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for a significant reduction in bezel width by optimizing the layout of data and driving voltage leads in different layers, enhancing the portability and design flexibility of flexible OLED devices.
Implementation Method 1
a light-emitting layer arranged between the anode layer and the cathode layer and configured to produce light based on a difference between the data voltage and the driving voltage
Data Source
AI summary
A flexible organic light-emitting diode (OLED) device includes a flexible substrate, a buffer layer, an inorganic layer, a first gate insulating layer, a second gate insulating layer, an inter-layer dielectric layer, a passivation layer, a pixel definition layer, a driving transistor, an OLED, a data voltage lead, and a driving voltage lead. The driving voltage lead is connected to the driving voltage terminal through a first hole which penetrates the second gate insulating layer, the first gate insulating layer, the inorganic layer, and the buffer layer, and through a second hole which penetrates the inter-layer dielectric layer. The data voltage lead and the driving voltage lead are arranged in different layers in a bendable inactive area. Compared with the related art, the layout space is omitted or saved in the present disclosure, which shortens the bezel effectively.


