Flexible On-Chip Memory Configuration for Error Correction

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Solution Overview

Problem

Existing on-chip memory (OCM) systems face challenges in efficiently supporting multiple error detection and correction mechanisms due to complexity and overhead issues, which affects chip area, performance, and reliability.

Innovation Solution

The proposed solution involves configuring OCMs with multiple memory banks, each supporting different error detection and correction mechanisms such as SECDED (n, k) and Parity (n), allowing for flexible reconfiguration to optimize chip area, throughput, and reliability based on specific requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If SECDED (64,8) mechanism is used, then throughput is improved, but chip area overhead increases to 12.5%

Engineering Contradiction:

ImprovethroughputVSAvoidchip area overhead

Core Design Contradiction:

ProductivityVSArea of stationary object

Solution Approach 1:

The patent implements dynamic reconfiguration capability that allows the OCM to switch between different SECDED mechanisms (e.g., SECDED 64,8 and SECDED 128,9) based on runtime requirements. This enables the system to optimize between throughput and area overhead by selecting the appropriate mechanism for each operation, rather than being fixed to a single configuration.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the error correction mechanism by allowing variable code word sizes and data block sizes. The OCM controller can adjust the (n, k) parameters dynamically, enabling transition from SECDED (64,8) to SECDED (128,9) or other configurations, thereby optimizing the trade-off between throughput and chip area overhead.

Inventive Principle:

Principle #35Parameter changes

2Area of stationary object

If SECDED (128,9) mechanism is used, then chip area overhead is reduced to 7%, but throughput decreases

Engineering Contradiction:

Improvechip area overheadVSAvoidthroughput

Core Design Contradiction:

Area of stationary objectVSProductivity

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Inventive Principle:

Principle #35Parameter changes

3Adaptability or versatility

If multiple SECDED mechanisms are supported, then adaptability is improved, but OCM controller complexity increases

Engineering Contradiction:

Improvesupport for multiple mechanismsVSAvoidOCM controller complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the OCM into multiple independent memory banks, where each bank can be independently configured to support different SECDED mechanisms. This segmentation allows the controller to manage complexity by treating each bank as a separate unit with its own configuration, rather than managing a single complex unified structure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements a universal OCM architecture where memory banks can serve multiple functions by supporting different SECDED mechanisms. The same physical memory infrastructure can be reconfigured to support SECDED (64,8), SECDED (128,9), or other mechanisms, reducing the need for separate dedicated structures for each mechanism.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Reliability

If SECDED mechanisms are used instead of Parity, then error correction capability is improved, but chip area overhead increases

Engineering Contradiction:

Improveerror correction capabilityVSAvoidchip area overhead

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements dynamic reconfiguration capability that allows the OCM to switch between SECDED mechanisms and Parity mechanisms based on runtime requirements. This enables the system to use error correction when reliability is critical and switch to more space-efficient Parity when error correction is not required, optimizing the trade-off between reliability and chip area overhead.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the error protection mechanism by allowing selection between different (n, k) configurations for SECDED and different parity bit configurations. This parameter flexibility enables the system to choose the most space-efficient mechanism that still provides adequate protection for the specific application.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20250199906A1Method and apparatus for flexible on-chip memory configuration to support multiple error detection and correction mechanisms

Publication Date: 2025.06.19 MARVELL ASIA PTE LTD

AI summary

A new approach is proposed that contemplates system and method to support multiple error detection and/or correction mechanisms via flexible on-chip memory (OCM) configurations. Here, an OCM includes a plurality of memory banks, wherein each of the plurality of memory banks includes a plurality of memory instances. Under the proposed approach, a first subset of the plurality of memory banks are configured to support a first type of error detection and/or correction mechanism while a second subset of the plurality of memory banks are configured to support a second type of error detection and/or correction mechanism. Moreover, a subset of memory instances within one or more of the plurality of memory banks are configured to store data and extra code words at the same time in order to efficiently support a specific type of error detection and/or correction mechanism.