Flexible Substrate Carrier Separation for Compact 3D Electronics
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Solution Overview
Problem
Existing methods for producing electronic components struggle to adapt to various application geometries and achieve a small area requirement while maintaining efficient production and connectivity between semiconductor chips.
Innovation Solution
A method involving a semiconductor arrangement with a carrier structure and a rewiring layer, where the carrier structure is separated into isolated elements connected by the rewiring layer, allowing for bending and three-dimensional arrangement of semiconductor chips, enabling compact designs and flexible attachment to curved surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a planar (two-dimensional) structure of circuits is used, then the production process is simple, but the area requirement is large
Solution Approach 1:
The patent transitions from a two-dimensional planar circuit structure to a three-dimensional arrangement by folding the flexible substrate. Multiple circuit areas are stacked vertically and connected through conductive vias in the folding regions, achieving compact spatial utilization while maintaining production simplicity
Solution Approach 2:
The patent implements a nested structure where multiple circuit layers are folded and stacked within a compact volume. Each folded layer contains functional circuits, and the layers are interconnected through conductive pathways in the folding regions, creating a space-efficient nested arrangement
2Area of stationary object
If the substrate is folded to reduce area, then the area requirement decreases, but the production process becomes more complex
Solution Approach 1:
The patent performs folding and connection operations during the substrate production process itself, before the electronic component is assembled. Conductive vias and connection structures are formed in advance during substrate manufacturing, simplifying the overall production workflow despite the three-dimensional folding geometry
Solution Approach 2:
The flexible substrate serves multiple functions: it provides the mechanical folding structure for three-dimensional arrangement, contains the circuit patterns, and incorporates conductive vias for inter-layer connections. This multi-functionality integrates structural and electrical functions into a single manufacturing process
3Area of stationary object
If multiple semiconductor chips are arranged on the same side, then the electrical connections are simple, but the area requirement increases
Solution Approach 1:
The patent arranges semiconductor chips on different sides of the folded substrate structure. Chips are mounted on opposing faces of the flexible substrate, connected through conductive vias that pass through the substrate thickness, achieving compact area utilization with three-dimensional inter-chip connectivity
Solution Approach 2:
The flexible substrate enables dynamic routing of electrical connections between chips on opposite sides. The conductive vias and flexible traces can accommodate the three-dimensional chip arrangement, providing adaptable electrical pathways that simplify the overall system layout
Data Source
Figure 1(a)~1(d)
Figure 2(a)~2(d)
Figure 3
AI summary
The invention relates to a method for manufacturing an electronic component (24) comprising the steps of: - providing a semiconductor arrangement (15) comprising a support structure (8) having at least one semiconductor chip (3, 4, 16) embedded in a potting compound (7), and a rewiring layer (14) having flexible material (9) and at least one conductor track (12, 13), wherein the support structure (8) is at least partially connected to the rewiring layer (14) and the at least one semiconductor chip (3, 4, 16) is electrically conductively connected to the rewiring layer (14), and - separating the support structure (8) along at least one separation trench (17, 17', 17", 17"', 17""), such that the support structure (8) is divided into at least two separate support elements (20, 21, 22, 23), wherein two adjacent of the separate Support elements (20, 21, 22, 23) across the respective separation trench (17, 17', 17", 17"',17"") are connected to each other by the rewiring layer (14).