Flexible Multi-Layer Substrate for Fine-Pitch Wafer Testing

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Solution Overview

Problem

Current probing technologies for wafer level packages face challenges in testing small, fine-pitch solder balls and bumps due to damage from probe marks, leading to poor contact resistance and increased costs, as they require additional optical inspection and risk oxidation, making it difficult to maintain structural integrity and achieve reliable bonding.

Innovation Solution

A flexible multi-layer substrate with electrical testing points is used, which contacts the solder balls and bumps without causing damage, ensuring a large contact area and low contact resistance, and is supported by an elastic body or protruding points to maintain structural completeness and prevent oxidation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional probe technology is used to test solder balls and bumps, then electrical contact is achieved, but the solder balls and bumps are damaged due to probe marks

Engineering Contradiction:
Improveelectrical contact qualityVSAvoiddamage to solder balls and bumps
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a compliant test pad structure as an intermediary between the probe and the solder ball/bump. The test pad deforms elastically under probe pressure to accommodate the spherical shape of the solder ball/bump, distributing the contact stress and preventing damage to the actual electrical connecting points while maintaining reliable electrical contact for testing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the mechanical parameters of the test structure by using compliant test pads with specific elastic properties. The test pads are designed with controlled thickness and material composition to provide appropriate compliance, allowing them to deform and conform to the solder ball/bump surface without transmitting excessive force that would cause damage.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If probe marks are made small to avoid damage, then contact resistance improves, but the probes cannot reliably contact the pads

Engineering Contradiction:
Improvecontact resistanceVSAvoidprobe contact reliability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments the contact interface into two distinct functional zones: the probe contact area on the test pad and the actual solder ball/bump surface. The test pad is designed with a larger probe contact area to ensure reliable probe engagement, while the actual electrical connecting points remain small and undamaged. This segmentation allows each zone to be optimized for its specific function.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If probe marks are made large to ensure probe contact, then probe engagement improves, but the pad surfaces are destroyed and gaps form in bonding surfaces

Engineering Contradiction:
Improveprobe contact reliabilityVSAvoidpad surface integrity
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The compliant test pad serves as a mediator that absorbs the mechanical stress between the probe and the solder ball/bump. The test pad deforms elastically to accommodate the probe contact, preventing the probe from directly contacting and damaging the solder ball/bump surface, thus maintaining pad surface integrity while ensuring reliable probe engagement.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If additional optical inspection machines are added to examine tested products, then yield rate is ensured, but burden and cost are increased

Engineering Contradiction:
Improveyield rateVSAvoidinspection equipment and processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent converts the potential harm of probe contact into a benefit by designing compliant test pads that intentionally deform during testing. This elastic deformation mechanism ensures that the testing process itself protects the solder balls and bumps from damage, eliminating the need for subsequent optical inspection to detect testing-induced damage and reducing overall inspection requirements.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for high-density, fine-pitch wafer level testing without damaging the solder balls or bumps, maintaining structural integrity and achieving low contact resistance, reducing the need for additional inspection and extending the usage life of the testing device.

Implementation Method 1

an elastic supporting body disposed between the frame and the flexible multi-layer substrate. When the at least one electrical connecting point contacts the at least one electrical testing point and applies a force to the at least one electrical testing point, the elastic supporting body is utilized for providing a supporting force to the flexible multi-layer substrate.

Methodology Applied
Scientific EffectElasticity: Elasticity

Implementation Method 2

a flexible multi-layer substrate fixed in the frame; and at least one electrical testing point corresponding to the at least one electrical connecting point, formed on an upper surface of the flexible multi-layer substrate for contacting the at least one electrical connecting point

Methodology Applied
Scientific EffectFlexibility: Elasticity

Data Source

PatentUS9182443B2Testing device and testing method thereof
Publication Date: 2015.11.10 PRINCO CORP
  • US9182443B2 patent drawing
  • US9182443B2 patent drawing
  • US9182443B2 patent drawing

AI summary

Disclosed are a testing device and a testing method thereof. The testing device includes a frame, a flexible multi-layer substrate and at least one electrical testing point. The frame is positioned corresponding to a chip. At least one electrical connecting point is formed on a surface of the chip. The flexible multi-layer substrate is fixed in the frame. The electrical testing point is corresponding to the electrical connecting point and formed on an upper surface of the flexible multi-layer substrate for contacting the electrical connecting point and performing an electrical test to the chip. Furthermore, the electrical connecting point or the electrical testing point is a bump.