Flexible TFT Manufacturing Using Clad Foil Etching
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Solution Overview
Problem
Conventional methods for manufacturing flexible semiconductor devices with thin film transistors are costly and inflexible due to the need for multiple vacuum processes and high-temperature steps, limiting the use of glass substrates and resulting in heavy, fragile displays.
Innovation Solution
A manufacturing method using a three-layer clad foil with a first metal layer, a second metal layer, and an inorganic insulating layer to form a gate electrode and source/drain electrodes without vacuum processes, allowing for the use of a resin substrate and reducing production costs and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional Si semiconductor manufacturing methods using vacuum processes are used, then manufacturing precision and device performance are improved, but device cost and manufacturing complexity increase significantly
Solution Approach 1:
The patent divides the manufacturing process into distinct segments: using separate metal layers (first metal layer for gate electrode, second metal layer for source/drain electrodes) and an inorganic insulating layer that can be processed independently. This segmentation allows each layer to be optimized and processed separately, reducing overall process complexity while maintaining precision.
Solution Approach 2:
The inorganic insulating layer serves as an intermediary between the gate electrode and source/drain electrodes, enabling precise control of the TFT structure without requiring complex vacuum processes. This intermediary layer simplifies the manufacturing sequence while maintaining manufacturing precision.
2Manufacturing precision
If multiple vacuum processes are used to form TFT layers, then manufacturing precision is improved, but productivity decreases due to repeated vacuum chamber operations
Solution Approach 1:
The patent prepares the inorganic insulating layer and metal layers in advance as a structured assembly before final TFT formation. This preliminary preparation of layered structures reduces the need for repeated vacuum chamber operations during actual TFT manufacturing, thereby improving productivity while maintaining precision.
Solution Approach 2:
The patent extracts the inorganic insulating layer as a separate, pre-prepared component that can be integrated into the TFT structure without requiring repeated vacuum processes. This extraction of the insulating layer preparation from the main manufacturing sequence improves manufacturing efficiency.
3Manufacturing precision
If high-temperature processes are used for Si semiconductor manufacturing, then semiconductor performance is improved, but substrate material options are limited to heat-resistant glass
Solution Approach 1:
The patent changes the processing temperature parameter by using low-temperature sintering (e.g., 900°C or lower) instead of conventional high-temperature Si processing. This parameter change enables the use of flexible resin substrates that cannot withstand high temperatures, thereby improving substrate material versatility while maintaining semiconductor layer quality through the inorganic insulating layer structure.
Solution Approach 2:
The patent employs a composite structure combining inorganic insulating layer with metal layers to create a TFT structure that can function at lower processing temperatures. This composite material approach enables compatibility with flexible substrates while maintaining the necessary electrical and structural properties for high-quality TFT performance.
4Reliability
If glass substrates are used for TFT manufacturing, then device reliability is improved, but device weight increases and flexibility is reduced
Solution Approach 1:
The patent changes the substrate material parameter from rigid glass to flexible resin materials by utilizing low-temperature processing enabled by the inorganic insulating layer structure. This parameter change reduces substrate weight and improves flexibility while maintaining device reliability through the stable inorganic insulating layer that ensures proper TFT function.
Data Source
AI summary
A layered film of a three-layer clad foil formed with a first metal layer 23, a second metal layer 25, and an inorganic insulating layer 35 interposed therebetween is prepared. After the second metal layer 25 is partially etched to form a gate electrode 20g, the first metal layer 23 is partially etched to form source/drain electrodes 20s, 20d in a region corresponding to the gate electrode 20g. A semiconductor layer 40 is then formed in contact with the source/drain electrodes 20s, 20d and on the gate electrode 20g with the inorganic insulating layer 35 interposed therebetween. The inorganic insulating layer 35 on the gate electrode 20g functions as a gate insulating film 30, and the semiconductor layer 40 between the source/drain electrodes 20s, 20d on the inorganic insulating layer 35 functions as a channel.