Flip-Chip Conductive Adhesive Stress Buffer for Fine Pitch Reliability
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Solution Overview
Problem
Existing flip-chip connection methods face challenges in securing connection reliability due to high elastic coefficients of solder bumps and low mechanical strength of low-k films, leading to stress concentration and potential cracks, especially with Pb-free solder bumps and low-k films, which complicates thermal expansion coefficient differences and fine pitch configurations.
Innovation Solution
A flip-chip connection structure using a conductive adhesive layer with a lower elastic coefficient than solder resist, which protrudes from the solder resist surface, absorbs thermal distortion and reduces stress, while preventing plating solution penetration and enhancing adhesion strength, allowing for stable connections without additional load application.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If solder bumps with high elastic coefficient are used for flip-chip connection, then connection strength is improved, but thermal stress concentration increases leading to cracks in low-k films
Solution Approach 1:
The patent introduces an intermediate layer between the solder bump and the substrate, which acts as a stress buffer to reduce thermal stress concentration on the low-k film. This intermediary layer absorbs the elastic mismatch between the high elastic coefficient solder bump and the substrate, preventing crack propagation while maintaining connection strength.
Solution Approach 2:
The patent employs composite material structures combining different materials with complementary properties. The connection structure integrates solder bumps with an intermediate layer made of materials specifically selected to balance elastic coefficients, creating a composite system that provides both mechanical strength and thermal stress resistance.
2Reliability
If additional load is applied during mounting to ensure connection, then connection reliability is improved, but manufacturing complexity and time increase
Solution Approach 1:
The patent designs a mounting structure that achieves reliable connection without requiring additional external load application during the mounting process. The intermediate layer and composite structure are configured to provide self-aligning and self-securing properties, allowing the connection to form reliably through the mounting process itself without extra steps.
Solution Approach 2:
The patent incorporates preliminary design features in the mounting structure, such as pre-configured intermediate layers and optimized geometric arrangements, that enable reliable connection formation during the standard mounting process. These preliminary structural arrangements eliminate the need for additional load application steps during mounting.
3Area of stationary object
If fine pitch configurations are used to increase component density, then area utilization is improved, but stress concentration and connection reliability worsen
Solution Approach 1:
The patent applies local quality enhancement by providing stress-relief intermediate layers specifically at the connection points where solder bumps contact the substrate. This localized structural modification addresses stress concentration issues at critical locations without affecting the overall fine pitch configuration, allowing high density while maintaining connection reliability.
Solution Approach 2:
The patent segments the connection structure into distinct functional layers: the solder bump layer for electrical connection, the intermediate layer for stress management, and the substrate layer for mechanical support. This segmentation allows each layer to be optimized for its specific function, enabling fine pitch configurations to maintain reliability through proper stress distribution across segments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively relieves thermal stress, improves connection reliability, and prevents short circuits, making it suitable for fine pitch configurations and various semiconductor elements by using a conductive adhesive layer with a lower elastic coefficient than the solder resist, ensuring stable and reliable connections.
Implementation Method 1
relieve a stress due to a difference in thermal expansion coefficient between the semiconductor element and the board
Implementation Method 2
An elastic coefficient of the conductive adhesive layer is lower than that of the solder resist
Implementation Method 3
The first electrode pad and the second electrode pad are connected via the brazing material protruding portion and a conductive adhesive layer
Implementation Method 4
a brazing material protruding portion is formed on a surface of the first electrode pad
Data Source
AI summary
In an electronic component mounting structure, a semiconductor element (an electronic component) provided with an electrode pad and a board provide with an electrode pad corresponding to the electrode pad are connected via a conductive material portion. On a surface of the board, there is formed solder resist having an opening regulating an area of the electrode pad. The conductive material portion is formed to protrude from a surface of the solder resist. An elastic coefficient of the conductive material portion is lower than that of the solder resist. A solder bump and the conductive material portion are connected via a metal layer. The conductive material portion is formed to have an area larger than that of the opening of the solder resist. An edge of the conductive material portion is adhered to a portion of the surface of the solder resist. Thus, in a case of mounting an electronic component on a board by flip-chip connection, a reliability of connection can be secured.