Flip Chip Backside Compression Grounding for Latchup Reduction
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Solution Overview
Problem
Integrated circuits, especially flip chips, are prone to latchup due to high effective sheet resistance in the substrate, which is not compatible with typical manufacturing processes and increases costs when trying to reduce substrate resistance.
Innovation Solution
An electrically conductive compression sheet with lower compression tips is applied to the back surface of the integrated circuit, making contact with the semiconductor material and coupled to a substrate lead on the chip carrier through a back surface shunt, reducing latchup incidents by lowering substrate resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bump bonding is used for integrated circuits, then manufacturing cost is reduced and assembly is simplified, but substrate resistance increases making the circuit more prone to latchup
Solution Approach 1:
The back surface grounding is segmented into multiple discrete contact points (compression tips) distributed across the substrate back surface, rather than requiring a continuous conductive layer. This segmentation allows effective grounding without the need for expensive conductive adhesive or solder applications.
Solution Approach 2:
The grounding approach transitions from a two-dimensional planar conductive layer on the front surface to a three-dimensional compression-based contact system on the back surface. The compression tips make contact through the substrate thickness, utilizing the Z-dimension to achieve electrical connection without affecting the front surface circuitry.
2Reliability
If conductive adhesive or solder is applied on the back surface to reduce lateral resistance, then latchup resistance improves, but manufacturing complexity increases and costs increase
Solution Approach 1:
The conductive material is extracted from the traditional front surface application and relocated to the back surface of the substrate. The compression tips provide the grounding function without requiring conductive adhesive or solder, eliminating the associated manufacturing complexity and cost.
Solution Approach 2:
The compression tips are made from inexpensive metal materials and can be easily replaced or adjusted. This approach uses simple, low-cost components rather than expensive conductive adhesives or solders, reducing overall manufacturing cost while maintaining effectiveness.
3Reliability
If substrate resistance is reduced during fab manufacturing, then latchup resistance improves, but this is incompatible with typical digital integrated circuit manufacturing processes
Solution Approach 1:
The back surface compression grounding is applied as a preliminary step before final device assembly. The compression tips are positioned and configured in advance to provide immediate grounding functionality, eliminating the need for subsequent resistance reduction steps during manufacturing.
Solution Approach 2:
The compression tips act as an intermediary element between the external grounding system and the substrate internal grounding network. This intermediary provides the necessary electrical connection without requiring modification of the substrate manufacturing process itself, maintaining compatibility with standard digital IC fabrication.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces latchup occurrences in integrated circuits by lowering the substrate resistance, enhancing the reliability and cost-effectiveness of the semiconductor device without compromising manufacturing processes.
Implementation Method 1
An electrically conductive compression sheet is disposed on the back surface of the integrated circuit. The electrically conductive compression sheet has lower compression tips which make electrical contact with the semiconductor material in the substrate at the back surface.
Data Source
AI summary
A semiconductor device includes an integrated circuit attached to a chip carrier in a flip chip configuration. A substrate extends to a back surface of the integrated circuit, and an interconnect region extends to a front surface of the integrated circuit. A substrate bond pad is disposed at the front surface, and is electrically coupled through the interconnect region to the semiconductor material. The chip carrier includes a substrate lead at a front surface of the chip carrier. The substrate lead is electrically coupled to the substrate bond pad. An electrically conductive compression sheet is disposed on the back surface of the integrated circuit, with lower compression tips making electrical contact with the semiconductor material in the substrate. The electrically conductive compression sheet is electrically coupled to the substrate lead of the chip carrier by a back surface shunt disposed outside of the integrated circuit.