Flip-Chip Packaging Module With Exposed Backside Cooling
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Solution Overview
Problem
Conventional packaging methods result in increased substrate area usage and high power consumption due to horizontal placement of chips and external components, and poor heat dissipation from epoxy molding compound coverage.
Innovation Solution
An integrated packaging module with chips connected in a flip-chip manner, exposing their backs and block terminals, allowing vertical placement of inductors, and using cladding metals or thermally conductive materials to dissipate heat and reduce electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If components are placed horizontally on the substrate, then the chip is protected and supported, but the substrate area increases and power consumption increases
Solution Approach 1:
The patent transitions from horizontal placement to vertical stacking architecture. The chip is flipped and mounted vertically on the substrate, with the inductor positioned above the chip in the vertical dimension. This three-dimensional arrangement reduces the lateral footprint on the substrate while maintaining all necessary functional connections through vertical vias and conductive paths.
2Reliability
If components are placed horizontally on the substrate, then the chip is protected and supported, but power consumption increases due to horizontal current path
Solution Approach 1:
The current path is reconfigured from horizontal to vertical orientation. Electrical connections are established through vertical vias and conductive structures that route current upward from the substrate to the chip and inductor, reducing the horizontal current path length and associated resistive power losses.
3Reliability
If the chip is covered with epoxy molding compound, then the chip is protected, but heat dissipation performance deteriorates
Solution Approach 1:
The epoxy molding compound is selectively removed or avoided from covering the back surface of the chip. The encapsulation is designed to expose the chip back, eliminating the thermal barrier that would otherwise be created by the epoxy material and enabling direct heat dissipation from the chip to the surrounding environment or heat sink structures.
Solution Approach 2:
The encapsulation structure is designed with spatially varying properties: the chip front and sides may be protected with encapsulant for mechanical protection, while the chip back surface is intentionally left exposed to maximize heat dissipation. This local differentiation allows simultaneous achievement of mechanical protection and thermal management.
4Temperature
If the chip is flipped with back facing upward, then heat dissipation is improved, but the chip structure becomes more complex
Solution Approach 1:
The flip-chip mounting technique combines multiple functions: it enables direct thermal contact between the chip back and heat dissipation structures, establishes electrical connections through solder bumps or conductive paste, and positions the chip in the optimal vertical orientation. This integration of mechanical, electrical, and thermal functions into a single mounting approach reduces overall system complexity despite the flipped configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces substrate area usage, lowers power consumption, and enhances heat dissipation while providing effective grounding and shielding against electromagnetic interference.
Implementation Method 1
the back of the chip facing upward
Implementation Method 2
the back of the chip facing upward
Implementation Method 3
an electrical contact coupled to the block terminal
Data Source
AI summary
An integrated packaging module includes an integrated circuit packaging module and an inductor. The integrated circuit packaging module includes a substrate, a chip, a block terminal and an encapsulation material. The chip is disposed on the substrate and is connected to the substrate in a flip-chip manner, with the back of the chip facing upward. The block terminal is disposed on the base substrate. The encapsulation material covers the substrate and exposes the back of the chip and the upper surface of the block terminal. The inductor is disposed above the integrated circuit packaging module and includes an electrical contact coupled to the block terminal.