Flip Chip Backside VCSEL Package Footprint Reduction
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Solution Overview
Problem
Conventional VCSEL packages with frontside emitting VCSELs require wire bonding, increasing the footprint and hindering heat dissipation due to the active region's location on the top side, far from the heatsink.
Innovation Solution
A flip chip backside VCSEL package with a VCSEL pillar array, where a first metal contact is formed on the top and a second metal contact on the backside, allowing solder to be applied for direct mounting to a substrate package, eliminating the need for bond wires and reducing the footprint through a one-step reflow process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is used to attach VCSEL device to external circuitry, then electrical connection is achieved, but the footprint of the VCSEL package assembly increases
Solution Approach 1:
The patent extracts and eliminates the wire bonding process and bond pads from the VCSEL package assembly. By using a flip-chip mounting approach where the VCSEL device is directly soldered to the substrate, the bond wires and extended bond pads are removed, thereby reducing the package footprint while maintaining electrical connection functionality
Solution Approach 2:
The patent inverts the conventional mounting approach by flipping the VCSEL device and mounting it upside down on the substrate. This inversion allows the bond pads to be located directly underneath the active region, enabling direct electrical connection through soldering without requiring wire bonds, thus reducing the package footprint
2Ease of manufacture
If front side mounting is used for VCSEL device, then assembly process is simplified, but heat dissipation is reduced due to active region being far from heatsink
Solution Approach 1:
The patent inverts the conventional front-side mounting approach by implementing flip-chip mounting where the VCSEL device is mounted upside down. This inversion places the active region directly above the heatsink, significantly improving thermal conduction and reducing junction temperature. The assembly process remains simplified through direct soldering without wire bonding
3Reliability
If bond wires and bond pads are used in VCSEL package, then electrical connection is established, but device footprint is increased
Solution Approach 1:
The patent extracts and eliminates bond wires and extended bond pads from the package assembly by using flip-chip mounting. The VCSEL device is directly soldered to the substrate with bond pads located directly underneath the active region, removing the need for wire bonds and reducing the device footprint to the minimal area required for the VCSEL structure itself
Solution Approach 2:
The patent merges the electrical connection function directly into the mounting structure by positioning bond pads directly underneath the active region and using solder to establish both mechanical and electrical connection simultaneously, eliminating the separate wire bonding step and reducing overall device footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies assembly, reduces the package footprint, and enhances heat dissipation by eliminating bond wires and pads, thereby increasing the yield and reducing form factors.
Implementation Method 1
Solder is applied on each pillar of the VCSEL pillar array to flip chip mount the VCSEL pillar array to the substrate package
Data Source
AI summary
A flip chip backside Vertical Cavity Surface Emitting Laser (VCSEL) package has a VCSEL pillar array. A first metal contact is formed over a top section of each pillar of the VCSEL pillar array. A second metal contact is formed on a back surface of the VCEL pillar array. An opening is formed in the second metal contact and aligned with the pillars of the VCSEL pillar array. Solder tip is applied on each pillar of the VCSEL pillar array to flip chip mount the VCSEL pillar array.


