Flip Chip BGA Underfill Void Detection via IR Reflow and X-Ray
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Solution Overview
Problem
Conventional flip chip ball grid array (FCBGA) packages face reliability issues due to coefficient of thermal expansion mismatches among components, leading to warpage, thermal stresses, delamination, and solder bump cracks, which can cause circuit failures and void formation during the underfill process.
Innovation Solution
The method involves performing an IR reflow process to fix connecting elements on the substrate, using X-ray detection to ensure no voids form between the chip and substrate, and incorporating support elements to reduce warpage and enhance structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional FCBGA packaging is used with multiple material layers, then the package can achieve complex functionality, but coefficient of thermal expansion mismatches cause uncontrolled bending and substrate surface distortions leading to component failure
Solution Approach 1:
A thin film structure is formed over the substrate surface, comprising a first portion over a first region and a second portion over a second region, with the second portion having different stress characteristics than the first portion. This flexible thin film configuration allows the substrate to accommodate thermal expansion mismatches while maintaining surface stability and preventing component failure.
2Reliability
If high temperature processes are used during packaging, then the chip and substrate can be properly bonded, but the substrate becomes overheated and generates excessive warpage
Solution Approach 1:
A thin film structure is formed over the substrate surface before chip mounting and underfilling processes. This pre-formed thin film acts as a stress compensation mechanism that prevents excessive warpage during high temperature bonding processes, allowing reliable bonding without substrate overheating and distortion.
3Reliability
If solder balls are used to electrically connect BGA package to PCB, then mechanical bonding and electrical coupling are achieved, but thermal stresses induce delamination and solder bump cracks degrading long term reliability
Solution Approach 1:
The thin film structure compensates for thermal expansion mismatches between the FCBGA package components (chip, substrate, underfill), reducing thermal stresses that would otherwise cause delamination and solder bump cracks. This extends the long term operating reliability while maintaining electrical connection integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents void formation, reduces thermal stresses, and enhances the reliability of the FCBGA package by ensuring complete encapsulation of connecting elements and reducing substrate warpage, thereby improving long-term operating reliability.
Implementation Method 1
an IR reflow process is performed after the chip is mounted on the substrate
Implementation Method 2
using X-ray detection to ensure no voids form between the chip and substrate
Data Source
AI summary
A method for detecting the under-fill void of the flip chip ball grid array package structure is provided, which includes providing a substrate having an interconnect structure and a plurality of interposers therein; providing a chip having an active surface and a back side, and a plurality of first connecting elements on the active surface of the chip; mounting and electrically connecting the active surface of the chip on the substrate; performing at least once IR reflow to fix the plurality of first connecting elements on the substrate; filling an encapsulate material to cover the active surface of the chip and the plurality of first connecting elements; performing a detecting process to detect that void is not formed between the active surface of the chip and the plurality of first elements; and forming a plurality of second connecting elements on the back side of the substrate to obtain a flip chip ball grid array package structure.