Composite Flip-Chip Bumps for Low-Impedance Pad Bonding

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Solution Overview

Problem

Conventional flip-chip packages experience high electrical impedance and reduced reliability due to the small contact area between conductive particles and contact pads, limiting their effectiveness.

Innovation Solution

The method involves using composite bumps with a non-conductive raiser, UBM layer, and bonding layer on a chip, which increases the bonding surface area when contacting the substrate's contact pads, reducing impedance and enhancing reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conductive particles in anisotropic conductive film are used for bonding, then the bonding process is simple, but the contact area is small leading to high electrical impedance

Engineering Contradiction:
Improvebonding process simplicityVSAvoidelectrical connection reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies composite materials by creating a multi-layered bump structure consisting of a non-conductive raiser, UBM layer, and bonding layer. This composite structure combines the benefits of different materials: the raiser provides mechanical support and positioning, the UBM layer ensures electrical connectivity to the bond pad, and the bonding layer creates a large contact area with the substrate, thereby reducing electrical impedance while maintaining manufacturing feasibility

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent transitions from a two-dimensional contact (conductive particles on substrate surface) to a three-dimensional structure (composite bumps with height and expanded bonding surface). The raiser elevates the bonding interface, and the bonding layer expands the contact area in the horizontal dimension, effectively increasing the bonding surface area from a point contact to an extended surface, thus reducing electrical impedance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If small contact area is used between conductive particles and contact pads, then the device structure is compact, but electrical impedance increases and reliability decreases

Engineering Contradiction:
Improvecontact areaVSAvoidelectrical connection reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The composite bump structure with its multi-layered design (raiser, UBM layer, bonding layer) enables a large bonding surface area on the substrate side while maintaining a compact overall footprint. The bonding layer specifically is designed to spread out and create extensive contact with the substrate, decoupling the contact area from the bump footprint and achieving both compactness and high reliability

Inventive Principle:
Principle #40Composite materials

3Quantity of substance

If conductive particles with small contact area are used, then material usage is minimized, but electrical impedance increases

Engineering Contradiction:
Improveconductive material quantityVSAvoidelectrical connection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent uses composite materials where the bonding layer is designed to spread thinly across a large area, providing extensive electrical contact without requiring large volumes of conductive material. The UBM layer provides the necessary electrical connection to the bond pad with minimal material, while the raiser provides structural support. This layered composite approach achieves low electrical impedance with optimized material quantity

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the physical parameters of the conductive structure by transitioning from discrete particles to a continuous bonding layer with controlled thickness and lateral dimensions. This parameter change allows the bonding layer to provide large contact area and low electrical impedance while using optimized quantities of conductive materials

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20230326894A1Flip chip bonding method and chip used therein
Publication Date: 2023.10.12 CHIPBOND TECH
  • US20230326894A1 patent drawing
  • US20230326894A1 patent drawing
  • US20230326894A1 patent drawing

AI summary

In a bonding process of a flip chip bonding method, a chip is bonded to contact pads of a substrate by composite bumps which each includes a raiser, a UBM layer and a bonding layer. Before the bonding process, the surface of the bonding layer facing toward the substrate is referred to as a surface to be bonded. During the bonding process, the surface to be bonded is boned to the contact pad and become a bonding surface on the contact pad. The bonding surface has an area greater than that of the surface to be bonded so as to reduce electrical impedance between the chip and the substrate.