Flip-Chip Bump Layout for Thermal Variation
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Solution Overview
Problem
Existing electronic circuit design systems fail to accurately represent and account for manufacturing variations, particularly thermal and centrifugal forces, which can lead to design rule violations and poor electrical connections in flip-chip packages with copper-pillar or solder bumps during the manufacturing process.
Innovation Solution
A computer-implemented method and system that allows users to insert and display copper pillar or solder bumps on a layout based on expected thermal or centrifugal force manufacturing variations, enabling actual placement and physical dimension adjustments, such as offset, rotation, and spread factor, before signoff, to improve manufacturability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional bump representation is used (only bump opening on die, small footprint on package), then layout simplicity is maintained, but manufacturing accuracy and reliability deteriorate due to inability to account for thermal and centrifugal force variations
Solution Approach 1:
The patent transitions from representing only the bump opening (2D footprint) to representing the complete 3D bump structure including top dimensions. This dimensional expansion allows the layout to capture manufacturing variations in all relevant directions, improving placement accuracy while maintaining a systematic approach to the increased complexity
Solution Approach 2:
The patent applies manufacturing variation adjustments (thermal expansion, centrifugal force effects) during the design phase rather than discovering them during manufacturing. By pre-calculating and incorporating these variations into the bump layout, the system achieves higher manufacturing precision without requiring complex real-time adjustments during production
2Reliability
If design variations for thermal and centrifugal forces are incorporated, then reliability improves by preventing design rule violations, but design complexity increases
Solution Approach 1:
The patent applies counter-actions to offset manufacturing variations before they cause problems. By calculating thermal expansion and centrifugal force effects in advance and adjusting the bump layout accordingly, the design preemptively compensates for forces that would otherwise cause design rule violations and connection failures, thereby improving reliability
Solution Approach 2:
The patent systematically varies key parameters (bump position, orientation, dimensions) based on calculated manufacturing variations. By adjusting these parameters according to thermal and centrifugal force models, the design maintains reliability across different manufacturing conditions without requiring a complete redesign process
3Measurement precision
If complete bump footprint is represented on package layout, then manufacturing accuracy improves, but information representation complexity increases
Solution Approach 1:
The patent divides the bump representation into distinct segments: the bump opening on the die side and the complete bump footprint on the package side. This segmentation allows each representation to be optimized independently - the die side maintains simplicity while the package side captures complete dimensional information for manufacturing accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the design for manufacturing process by anticipating and mitigating potential manufacturability issues, reducing yield loss and improving reliability by ensuring accurate bump placement and electrical connections.
Implementation Method 1
determining an expected thermal or centrifuge force manufacturing variation associated with the electronic design
Implementation Method 2
determining an expected thermal or centrifuge force manufacturing variation associated with the electronic design
Data Source
AI summary
The present disclosure relates to a computer-implemented method for use in design for manufacturing associated with a die or package. Embodiments may include providing, using a processor, an electronic design and displaying, at a graphical user interface, at least a portion of a layout associated with the electronic design. Embodiments may also include determining an expected thermal or centrifuge force manufacturing variation associated with the electronic design. Embodiments may further include allowing a user to insert, at the graphical user interface prior to signoff, a copper pillar bump or solder bump on at least a portion of the layout based upon, at least in part, the determined expected thermal or centrifuge force manufacturing variation. Embodiments may further include displaying the copper pillar bump or the solder bump on the layout at the graphical user interface.