Flip Chip Package Substrate Cavities for Solder Bridge Prevention
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Solution Overview
Problem
In flip chip packaging, the decreasing size and increasing density of semiconductor devices lead to issues such as solder bridges, shorts, die tilt, and misalignment due to non-uniform bond line thickness and spacing, resulting in failures and scrapping of devices during testing.
Innovation Solution
The use of package substrates with cavities formed at locations corresponding to post connect positions, where solder joints are formed within these cavities during thermal reflow, ensuring controlled bond line thickness and preventing solder bridging and die tilt by containing the solder within the cavities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the pitch distance between conductive post connects is decreased to increase connection density, then the quantity of connections increases, but solder bridges and shorts occur during thermal reflow
Solution Approach 1:
The patent divides the continuous solder flow path into separate segmented cavities, each containing an individual solder joint. The cavities are spaced apart to prevent solder bridges while maintaining high connection density. This segmentation allows increased quantity of connections without proportionally increasing solder bridge risk.
Solution Approach 2:
The patent creates localized cavities with specific geometric properties (depth, width, spacing) at each post connect location. These local structural modifications control solder flow and containment individually at each connection point, enabling high density connections while maintaining reliability through localized quality control rather than uniform global constraints.
2Ease of manufacture
If bond line thickness is not uniform across the semiconductor die, then device integration is simplified, but die tilt defects occur during solder reflow
Solution Approach 1:
The patent pre-forms cavities in the package substrate before mounting the semiconductor die. These cavities are positioned and dimensioned to compensate for anticipated bond line thickness variations. By performing this preliminary structural preparation, the system accommodates non-uniform bonding while preventing die tilt during reflow, resolving the contradiction between manufacturing ease and precision.
Solution Approach 2:
The patent modifies the cavity parameters (depth, width, position) based on the specific post connect locations and expected bond line variations. By changing these geometric parameters locally, the system maintains manufacturing simplicity while achieving the precision needed to prevent die tilt, as the cavity dimensions are optimized for each location rather than requiring uniform bond line thickness across the entire die.
3Reliability
If cavities are formed in package substrate leads, then solder bridging and die tilt are prevented, but device complexity increases
Solution Approach 1:
The cavities in the package substrate leads serve multiple functions simultaneously: they contain solder during reflow to prevent bridging, provide mechanical support to prevent die tilt, and establish precise alignment features. By making these structures multi-functional, the patent achieves improved reliability without proportionally increasing complexity, as a single structural feature accomplishes multiple objectives.
Solution Approach 2:
The cavities act as intermediary structures between the package substrate and the semiconductor die post connects. These intermediate features mediate the interaction during solder reflow, controlling solder flow and providing mechanical constraints without requiring complex external fixtures or additional processing steps. The intermediary cavities simplify the overall system by embedding complexity within the substrate itself rather than adding external complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces or eliminates solder bridging, die tilt, and misalignment defects, enhancing the reliability and performance of flip chip semiconductor packages by maintaining uniform bond line thickness and ensuring proper alignment during the soldering process.
Implementation Method 1
the solder bumps at the distal end of the post connects are subjected to a thermal reflow process so that the solder melts and flows to form solder joints
Implementation Method 2
the solder bumps at the distal end of the post connects are subjected to a thermal reflow process
Data Source
AI summary
In a described example, an apparatus includes: a package substrate for mounting a semiconductor die to a die side surface, the package substrate including leads spaced from one another; and cavities extending into the leads from the die side surface, the cavities having sides and a bottom surface of the lead material, the cavities at locations corresponding to post connect locations on the semiconductor die.