Flip-Chip Package Flow Control to Prevent Underfill Voids
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Solution Overview
Problem
In the manufacture of flip-chip semiconductor packages, a void trap often occurs under the semiconductor chip due to the large gap between the chip and the package substrate, which affects the reliability and performance of the package.
Innovation Solution
The semiconductor package includes a package substrate with specific regions and flow control structures that control the flow speed of the molding material during the molding process, ensuring that the gap between the chip and the substrate is adequately filled without voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the gap between the semiconductor chip and package substrate is large, then the chip mounting is easier, but void traps occur during molding
Solution Approach 1:
The patent introduces flow control structures with varying spacing distances at different locations on the package substrate. The spacing distance gradually decreases toward the chip mounting region, creating localized flow control zones that manage molding material flow speed in specific areas to prevent void traps while maintaining ease of chip mounting
Solution Approach 2:
The flow control structures create dynamic flow speed variation for the molding material. By having spacing distances that gradually decrease toward the chip mounting region, the molding material flow speed is dynamically adjusted - faster in regions farther from the chip and slower near the chip - preventing void formation while accommodating the large gap structure
2Productivity
If molding material flow speed is high, then productivity is improved, but void traps occur under the chip
Solution Approach 1:
The patent implements dynamic flow speed control by varying the spacing distance between flow control structures. The spacing gradually decreases toward the chip mounting region, creating a progressive deceleration zone that maintains high overall molding speed while preventing void traps in the critical area under the chip
Solution Approach 2:
Different regions of the package substrate have different flow control characteristics. Regions farther from the chip have larger spacing for faster flow (maintaining productivity), while regions near the chip have smaller spacing for slower flow (preventing voids), achieving localized optimization of both speed and reliability
Data Source
AI summary
A semiconductor package includes a package substrate having a first region, a second region and third region sequentially arranged from a first side portion to a second side portion thereof. The second region has a chip mounting region in a central region. A semiconductor chip is disposed in the chip mounting region and is mounted on a plurality of substrate pads of the package substrate. A pair of first flow control structures is disposed in the first region and is arranged symmetrically on both sides along a center line passing through a center of the chip mounting region. At least one pair of second flow control structures is disposed in the second region of the package substrate and is arranged symmetrically on both sides of the chip mounting region. A molding member is on the package substrate and fills a gap between the semiconductor chip and the package substrate.