Flip-Chip Semiconductor Gate Wiring With Non-Overlapping Bond Surface

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Solution Overview

Problem

Conventional semiconductor devices face difficulties in easily wiring to electrodes, particularly when the gate electrode faces downward, making direct bonding of wires challenging.

Innovation Solution

The semiconductor device incorporates a first conductive member with recessed surfaces and a connecting member that allows easy bonding to the gate electrode by facing the bond surface in the same direction as the reverse surface of the semiconductor element, preventing overlap and facilitating wiring.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the semiconductor element is mounted by flip chip bonding with the obverse surface facing downward, then the gate electrode faces downward for compact packaging, but it becomes difficult to directly bond wires to the gate electrode

Engineering Contradiction:
Improvedevice packaging compactnessVSAvoidwiring ease
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent introduces a conductive member as an intermediary between the gate electrode and the wire. This conductive member has a first bond surface that bonds to the gate electrode and a second bond surface that bonds to the wire, mediating the connection when the gate electrode faces downward and enabling wiring without direct access to the gate electrode surface

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The conductive member extends in the thickness direction of the semiconductor element, creating a vertical connection path. The first bond surface and second bond surface are spaced apart in the thickness direction, allowing electrical connection to be established in three-dimensional space rather than requiring direct surface access

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If the second bond surface of the conductive member overlaps with the semiconductor element in the thickness direction, then compact stacking is achieved, but unintended electrical connections may occur

Engineering Contradiction:
Improvedevice compactnessVSAvoidelectrical connection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent extracts or removes the overlapping portion of the conductive member in the thickness direction. The second bond surface is positioned to not overlap with the semiconductor element, eliminating the potential for unintended electrical connections while maintaining the vertical spacing needed for reliable bonding

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12412814B2Semiconductor apparatus
Publication Date: 2025.09.09 ROHM CO LTD
  • US12412814B2 patent drawing
  • US12412814B2 patent drawing
  • US12412814B2 patent drawing

AI summary

A semiconductor device includes a semiconductor element, a conductive member and a connecting member. The semiconductor element has a reverse surface formed with a first electrode and an obverse surface formed with a second electrode and a third electrode. The reverse surface and the obverse surface are spaced apart from each other in a z direction. Current flow between the first electrode and the second electrode is on-off controlled according to a first drive signal inputted to the third electrode. The conductive member has a first bond surface and a second bond surface each facing in the same direction as the reverse surface. The third electrode is bonded to the first bond surface. The connecting member is bonded to the second bond surface, and the second bond surface does not overlap with the semiconductor element as viewed in the z direction.