Flip Chip Packaging with L-Shaped Interconnects for Low Profile
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Solution Overview
Problem
Conventional semiconductor packaging systems face challenges in achieving low cost manufacturing, improved yield, low profile, and reliability, particularly in miniaturized portable devices, where package-on-package designs encounter reliability issues and higher costs.
Innovation Solution
The integrated circuit packaging system features external interconnects with L-shape configurations, where the tips and bases of different thicknesses are used to connect circuit devices with a combined thickness less than the base thickness, and an encapsulation is formed between the bases and over the tips, simplifying the packaging structure and enhancing connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If package-on-package designs are used to increase packaging density, then component density is improved, but reliability deteriorates and cost increases
Solution Approach 1:
The patent inverts the conventional packaging approach by using flip chip technology where the chip is flipped and mounted with its active surface facing downward toward the substrate, rather than the conventional upward-facing active surface. This inversion enables direct bonding of chip pads to substrate pads through solder bumps, eliminating the need for wire bonds and intermediate interconnect structures, thereby improving reliability while maintaining high packaging density
Solution Approach 2:
The patent implements nested packaging by stacking multiple circuit devices vertically on top of each other, with the first circuit device mounted on the substrate and the second circuit device mounted on top of the first device. This vertical nesting arrangement increases packaging density without expanding the horizontal footprint, while the direct flip chip interconnection method ensures reliable electrical connections between stacked devices
2Strength
If conventional molding approaches are used to protect semiconductor dies, then device protection is improved, but package profile and cost are worsened
Solution Approach 1:
The patent employs a thin film encapsulation layer that conformally coats the flip chip devices and interconnect structures, providing mechanical protection and environmental sealing without adding significant thickness. This thin film approach maintains a low package profile while ensuring adequate device protection, unlike conventional thick mold compounds
3Adaptability or versatility
If additional connectivity structures are added to improve electrical connections, then connectivity is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent merges multiple functions into the solder bumps that connect the flip chip to the substrate: the solder bumps simultaneously provide mechanical bonding, electrical connection, and stress compensation. This consolidation eliminates the need for separate wire bonds, substrate pads, and interconnect layers, reducing manufacturing complexity while maintaining excellent connectivity between components
Data Source
AI summary
A method of manufacture of an integrated circuit packaging system includes: forming external interconnects having bases of a first thickness and tips of a second thickness extending inwardly directly toward each other; connecting a first circuit device between the tips; attaching a second circuit device to the first circuit device with a combined thickness of the first circuit device and the second circuit device less than the first thickness; and forming an encapsulation of the first thickness between the bases and over the tips.