Flip-Chip Land Offset Structure to Prevent Insulating Film Cracks

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Solution Overview

Problem

In semiconductor devices using the flip-chip connection method, the miniaturization trend leads to decreased bump distances, and heat treatment during mounting can cause cracks in the insulating film of the wiring substrate, potentially resulting in short circuits due to solder material flow into these cracks.

Innovation Solution

The semiconductor device design includes a land with its center shifted towards the semiconductor chip center, increasing the adhesion area between the land and the insulating film, thereby enhancing delamination resistance and preventing cracks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the distance between two bumps is decreased to achieve miniaturization, then the device size is reduced, but the risk of crack formation and short circuit increases

Engineering Contradiction:
Improvedevice sizeVSAvoidshort circuit risk
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by creating an asymmetric land configuration where the center of the land is shifted toward the center of the semiconductor chip rather than being centered under each bump. This local structural modification increases the adhesion area between the land and insulating film specifically in critical regions, providing enhanced crack resistance at the location where stresses are most concentrated during heat treatment, while maintaining the overall miniaturized device structure.

Inventive Principle:
Principle #3Local quality

2Strength

If heat treatment is applied during mounting to achieve proper bonding, then the bonding strength is improved, but cracks may form in the insulating film causing short circuits

Engineering Contradiction:
Improvebonding strengthVSAvoidinsulating film integrity
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by designing an asymmetric land structure with increased adhesion area to the insulating film before heat treatment is applied. This pre-configured structural feature acts as a cushioning mechanism that absorbs and distributes the thermal stresses generated during heat treatment, preventing crack formation in the insulating film even when high temperatures are applied for bonding, thus maintaining both bonding strength and insulating film integrity.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If the land center is aligned with the opening portion center, then the manufacturing process is simplified, but the adhesion area is reduced leading to poor delamination resistance

Engineering Contradiction:
Improvealignment simplicityVSAvoiddelamination resistance
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent directly applies asymmetry by intentionally misaligning the land center from the opening portion center, shifting the land center toward the center of the semiconductor chip. This asymmetric configuration increases the adhesion area between the land and insulating film, thereby improving delamination resistance. While this requires slightly more complex manufacturing alignment, it provides superior mechanical strength and crack resistance compared to symmetric alignment.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS20250201694A1Semiconductor device
Publication Date: 2025.06.19 RENESAS ELECTRONICS CORP
  • US20250201694A1 patent drawing
  • US20250201694A1 patent drawing
  • US20250201694A1 patent drawing

AI summary

A semiconductor device including: a semiconductor chip mounted on a wiring substrate such that a main surface of the semiconductor chip faces a front surface of an insulating film of the wiring substrate; and a bump electrically connecting a land and an electrode pad. Here, in cross-sectional view, a center of the land is shifted in a direction from a center of an opening portion, which exposes a part of the land, of the insulating film toward a center of the semiconductor chip is provided.