Flip-Chip Laser Die Integration on Silicon Photonics

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Solution Overview

Problem

Integrated optoelectronic devices, such as Silicon Photonics (SiP) devices, face limitations in electrical performance due to wire bonding, which degrades signal integrity and limits signal bandwidth, and require improved heat dissipation from heat-generating components.

Innovation Solution

The development of an optoelectronic device with a trench formed in the surface of a SiP wafer, where a laser die is mounted, and electrically conductive bumps or a ball grid array are used to connect the laser die to a substrate, allowing for flip-chip assembly and improved heat dissipation through a heat sink.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding is used to connect optoelectronic components, then electrical connections can be established, but signal integrity degrades and signal bandwidth is limited due to intrinsic inductance and parasitic capacitance

Engineering Contradiction:
Improvesignal integrityVSAvoidelectrical connection structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the wire bonding interconnect structure by directly integrating the laser die onto the SiP die using flip-chip technology. This removes the parasitic inductance and capacitance associated with wire bonds, thereby improving signal integrity and bandwidth while reducing structural complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the laser die and SiP die into a single integrated package using flip-chip mounting. The electrical interconnects are formed directly between corresponding pads on the laser die and SiP die, eliminating separate wire bonding steps and reducing overall device complexity while enhancing electrical performance.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If heat-generating components are integrated on SiP devices, then device functionality is achieved, but heat dissipation becomes insufficient

Engineering Contradiction:
Improvedevice functionalityVSAvoidheat dissipation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent implements a multi-functional heat sink structure that serves both as a thermal management solution and as part of the electrical interconnect system. The heat sink is thermally coupled to the laser die to conduct heat away, while also providing an electrical connection path, thereby addressing both heat dissipation and electrical connectivity needs simultaneously.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces a heat sink as an intermediary component between the heat-generating laser die and the surrounding environment. This heat sink acts as a thermal conductor that facilitates heat transfer from the laser die, enabling effective heat dissipation while maintaining device functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If traditional wire bonding methods are used, then electrical connections are established, but the device footprint is larger

Engineering Contradiction:
Improveelectrical connection easeVSAvoiddevice footprint
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent transitions from planar wire bonding connections to three-dimensional flip-chip mounting with vertical electrical interconnects. This dimensional change allows electrical connections to be made directly between opposing surfaces of the laser die and SiP die, significantly reducing the horizontal footprint while maintaining ease of electrical connection through standardized flip-chip processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces intrinsic inductance and parasitic capacitance, enhancing electrical performance and heat dissipation, enabling high-speed signal exchange with high signal integrity and reduced footprint compared to traditional wire bonding methods.

Implementation Method 1

a heat sink coupled to an opposite surface of the optoelectronic die, which is opposite the surface having the trench, and is configured to conduct heat from the optoelectronic die

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Implementation Method 2

an electrically conductive layer extends from the floor, via the first wall, to the surface. The first electrode is coupled to the electrically conductive layer

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

The electrical interconnects are formed on the second electrode of the laser die and on selected locations on the surface of the optoelectronic die, the electrical interconnects are coupled to a substrate, and are configured to conduct electrical signals between the optoelectronic die and the substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10295740B2Integrating silicon photonics and laser dies using flip-chip technology
Publication Date: 2019.05.21 MELLANOX TECHNOLOGIES LTD(IL)
  • US10295740B2 patent drawing
  • US10295740B2 patent drawing

AI summary

An optoelectronic device includes an optoelectronic die, a laser die, and electrical interconnects. The optoelectronic device has a surface. A trench having first and second walls and a floor is formed in the surface, and an electrically conductive layer extends from the floor, via the first wall, to the surface. The laser die includes first and second electrodes and a laser output aperture. The laser die is mounted in the trench and is configured to emit a laser beam. The first electrode is coupled to the electrically conductive layer and the laser output aperture is mechanically aligned with a waveguide that extends from the second wall. The interconnects are formed on the second electrode of the laser die and on selected locations on the surface of the optoelectronic die. The interconnects are coupled to a substrate, and are configured to conduct electrical signals between the optoelectronic die and the substrate.