Flip-Chip LED Substrate Segmented Metal Patterns for Thermal Stress
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Solution Overview
Problem
Conventional LED flip-chip packaging substrates face issues with thermal stress-induced chip cracks due to differences in thermal expansion coefficients between the substrate and the LED, and challenges in forming a uniform reflector layer.
Innovation Solution
A substrate design featuring multiple metal patterns, isolation lines, and vias that minimizes thermal stress by strategically placing metal patterns and forming a uniform reflector layer on the substrate to connect the metal patterns and the LED chip, ensuring even light distribution and reducing chip cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional package substrate with isolated plating regions is used, then the substrate structure is simple, but thermal stress causes chip crack at attachment region
Solution Approach 1:
The metal pattern is divided into multiple isolated regions (first, second, third metal patterns) separated by isolation lines. This segmentation allows each metal region to independently manage thermal expansion, reducing stress concentration at the chip attachment region while maintaining electrical connectivity through vias.
Solution Approach 2:
Different regions of the substrate are assigned different metal patterns with specific geometries and positions. The first metal pattern overlaps the chip mount region for direct thermal management, while the second and third metal patterns are positioned at outer sides for stress distribution, creating localized functional zones that address specific thermal stress problems.
2Ease of manufacture
If the electrode-isolating line is formed at a location deviated from the center, then the manufacturing process is simplified, but thermal stress causes chip crack
Solution Approach 1:
The metal patterns and isolation lines are positioned asymmetrically relative to the chip mount region, with the first metal pattern overlapping part of the chip mount region while the second and third metal patterns are at outer sides. This asymmetric arrangement optimizes thermal stress distribution while maintaining ease of manufacturing through standard photolithography processes.
3Device complexity
If a simple metal pattern is used, then the manufacturing process is simple, but uniform reflector formation is difficult
Solution Approach 1:
The metal patterns extend in multiple dimensions with specific geometries - the first metal pattern overlaps the chip mount region in one dimension, while the second and third metal patterns extend to outer sides in perpendicular dimensions. This multi-dimensional arrangement provides uniform support for reflector formation, ensuring consistent thickness across the reflector layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal stress-induced defects in LED packaging, enhances light efficiency, and improves the reliability of the LED manufacturing process by ensuring uniform reflector formation and efficient light distribution.
Implementation Method 1
The via is disposed to connect the first and second metal patterns to the lower pad in the substrate
Implementation Method 2
The first isolation line is defined in a boundary between the first metal pattern and the second metal pattern
Data Source
AI summary
A substrate for packaging flip-chip light emitting device (LED) includes a substrate including a chip mount region, a first metal pattern overlapping a part of the chip mount region and disposed on the substrate, a second metal pattern disposed in a region including the chip mount region that is not overlapped with the first metal pattern, at an outer side of the first metal pattern, a third metal pattern disposed at an outer side of the second metal pattern, a first isolation line defined in a boundary between the first metal pattern and the second metal pattern, a second isolation line defined in a boundary between the second metal pattern and the third metal pattern, a lower pad disposed on a bottom of the substrate, and a via disposed to connect the first and second metal patterns to the lower pad in the substrate.