Flip-Chip LED Reflective Layer Layout to Reduce Bonding Voids
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Solution Overview
Problem
Conventional flip-chip light emitting diode structures suffer from low yield due to void defects formed during the bonding process, which affects the light emitting efficiency and reliability.
Innovation Solution
A flip-chip light emitting diode structure with dual patterned current blocking layers, where the first and second patterned current blocking layers are complementary and embedded within a reflective layer, along with a transparent conductive layer and electrode contacts, to reduce void defects and enhance light output efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional single current blocking layer is used in the flip-chip LED structure, then the device complexity is low, but void defects form during bonding process resulting in low yield
Solution Approach 1:
The current blocking layer is divided into two separate patterned layers (first and second patterned current blocking layers) positioned on different planes. This segmentation allows each layer to perform specific functions in reducing void defects at different bonding interfaces, thereby improving yield without creating an unmanageably complex structure.
Solution Approach 2:
The patent introduces a vertical dimensionality by positioning the two patterned current blocking layers on different planes (first plane and second plane respectively). This multi-planar arrangement enables better control of void defect formation during the bonding process by addressing void prevention from multiple vertical levels, thus improving yield while maintaining reasonable structural complexity.
2Reliability
If the current blocking layer patterns are not complementary, then the manufacturing process is simpler, but void defects occur between substrates during bonding
Solution Approach 1:
The first and second patterned current blocking layers are designed with complementary patterns where each layer's pattern is optimized for its specific plane and bonding interface. The first patterned current blocking layer addresses void prevention at its interface, while the second patterned current blocking layer addresses void prevention at its interface, with their patterns being substantially complementary to collectively prevent voids throughout the bonding process.
3Productivity
If a dual patterned current blocking layer structure is implemented, then void defects are reduced and yield is improved, but the device complexity increases
Solution Approach 1:
The two patterned current blocking layers are merged with the reflective layer to form an integrated structure where the current blocking functions and light reflection functions are combined. This merging approach allows the dual-layer current blocking structure to perform multiple functions (void defect reduction and light reflection) simultaneously, improving yield while minimizing the increase in overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual current blocking layers significantly reduce void defects and improve the yield and brightness of the flip-chip light emitting diode structure by ensuring better bonding and light distribution.
Implementation Method 1
The reflective layer is used to adjust the output direction of light and improve the light output efficiency of the light emitting diode
Data Source
AI summary
The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.