Flip-Chip IC Package with Interposed Memory Dice
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Solution Overview
Problem
Conventional microprocessor systems with separate integrated circuit dice face limitations in pin counts and signal speeds, leading to increased size and routing complexity in the substrate when trying to integrate a microprocessor die with memory or chipset dice within a single package.
Innovation Solution
A microprocessor die is coupled to an integrated circuit package substrate with memory or chipset dice placed between the microprocessor die and the substrate in a flip-chip arrangement, using solder balls for connection, which reduces routing and substrate size requirements by allowing efficient signal routing and using a substrate with conductive layers and dielectric materials for efficient electrical signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a microprocessor die and memory dice are integrated within a single package, then interface speed is improved, but substrate size and routing complexity increase
Solution Approach 1:
The patent transitions from planar routing to three-dimensional vertical routing by stacking memory dice between the microprocessor die and substrate. This dimensional change allows signals to route vertically through the stack rather than horizontally across the substrate, reducing routing complexity while maintaining high-speed communication.
Solution Approach 2:
The patent implements a nested structure where memory dice are positioned between the microprocessor die and the substrate, creating a layered configuration. This nesting allows multiple functional layers to coexist in a compact vertical arrangement, reducing the horizontal footprint and simplifying substrate routing requirements.
2Speed
If a microprocessor die and memory dice are integrated within a single package, then interface speed is improved, but substrate size increases
Solution Approach 1:
The patent moves the integration architecture from a two-dimensional planar layout to a three-dimensional vertical stack. By placing memory dice vertically between the microprocessor die and substrate, the design reduces the horizontal area required on the substrate while enabling high-speed interfaces through direct vertical signal paths.
Solution Approach 2:
The patent merges the microprocessor die and memory dice into a single integrated package structure with the memory dice positioned between the processor and substrate. This consolidation eliminates the need for separate packages and long horizontal interconnects, reducing overall substrate area while improving interface speed through proximity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration provides faster interface speeds and reduces substrate size and routing complexity, enabling more efficient integration of microprocessor and memory dice within a single package, enhancing system performance.
Implementation Method 1
A microprocessor die is coupled to an integrated circuit package substrate with memory or chipset dice placed between the microprocessor die and the substrate in a flip-chip arrangement, using solder balls for connection, which reduces routing and substrate size requirements
Data Source
AI summary
A system may include a microprocessor die, an integrated circuit package substrate, and a die disposed between the microprocessor die and the integrated circuit package substrate. In some embodiments, the integrated circuit package substrate defines a first cavity, and the die is disposed at least partially within the first cavity.