Flip Chip Overmold Package Warpage Reduction
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Solution Overview
Problem
The challenge is to create a mechanically stable and cost-effective integrated circuit (IC) package that accommodates increasing processing power without sacrificing area or performance, while addressing package warpage due to coefficient of thermal expansion (CTE) mismatches and poor adhesion between the lid and the body, and ensuring sufficient space for decoupling capacitors.
Innovation Solution
A rigid support member is affixed to the package substrate with an adhesive spacer to elevate decoupling capacitors, and a heat sink with varying thicknesses is used to minimize the thermal interface material layer, optimizing heat transfer and adhesion, while a molding compound is injected to surround the components, creating a balanced package structure and reducing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the package size is reduced to fit more processing power, then device miniaturization is achieved, but package warpage and adhesion problems worsen due to CTE mismatches
Solution Approach 1:
The patent applies local quality by creating a recessed region in the lid with varying thickness - thinner at the periphery and thicker at the center. This non-uniform thickness distribution locally adjusts the mechanical properties to compensate for CTE mismatches and reduce package warpage while maintaining overall miniaturization.
Solution Approach 2:
The patent uses composite materials by combining the lid with different thickness regions, adhesive spacers, and molding compound to create a multi-layer composite structure. This composite design allows different regions to handle different stress conditions, improving adhesion and reducing warpage in the miniaturized package.
2Quantity of substance
If more decoupling capacitors are added to accommodate increasing power needs, then power supply capability is improved, but package area is consumed
Solution Approach 1:
The patent resolves the area conflict by utilizing the vertical dimension - creating a recessed region in the lid that allows decoupling capacitors to be positioned underneath the lid in the vertical space. This enables more capacitors to be accommodated without increasing the horizontal package footprint.
Solution Approach 2:
The patent applies nesting by placing decoupling capacitors underneath the lid structure, effectively nesting components within the vertical space of the package. This allows maximum component density within the constrained package area.
3Strength
If adhesive spacers are used to elevate the lid, then lid adhesion is enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-attaching adhesive spacers to the lid before the molding compound injection process. This preliminary attachment ensures proper lid elevation and adhesion are established early in manufacturing, simplifying subsequent assembly steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces package warpage, enhances lid adhesion, and allows for more decoupling capacitors without increasing the IC package size, improving mechanical stability and thermal management while maintaining performance.
Implementation Method 1
A rigid support member surrounding a peripheral edge of the IC is affixed to the package substrate through an adhesive spacer
Implementation Method 2
a molding compound is injected to surround the components
Implementation Method 3
a heat sink with varying thicknesses is used to minimize the thermal interface material layer, optimizing heat transfer
Data Source
Figure 1~2
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Figure 5~6
AI summary
An integrated circuit (IC) package having a packaging substrate, an IC disposed onto the packaging substrate, and a rigid support member attached to the substrate layer through an adhesive spacer is provided. The packaging substrate includes multiple decoupling capacitors positioned thereon around the IC. A heat sink is placed over the IC. The rigid support member provides enhanced structural support for the IC packaging and there is ample space between a bottom surface of the rigid support member and the packaging substrate to allow the placement of the decoupling capacitors underneath the rigid support member.