Flip-Chip Component Production Method With Planar Support Frame
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Solution Overview
Problem
Existing component encapsulation methods using flip-chip technology face challenges in achieving reliable sealing and minimizing mechanical stress on sensitive components, particularly when mounted on uneven or non-linear substrates, leading to potential outgassing and mechanical instability.
Innovation Solution
A component design featuring a planar support frame with bumps that matches the height of the bumps, providing a positive-fit contact with the component chip, and integrated electrical wiring on a multi-layer carrier substrate, along with additional support elements and metallization structures for secure and low-stress contacting, and hermetic sealing using a combination of metal layers and laminate films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a frame is arranged between the component chip and carrier substrate with a narrow gap to form a hollow space, then the component structures are held, but the closure of the cavity is insufficient leading to potential outgassing into the cavity
Solution Approach 1:
The frame is pre-formed with a planar top surface before mounting the component chip. This preliminary planarization ensures that when the chip is mounted, its bottom surface contacts the frame uniformly, creating effective sealing before any outgassing can occur during subsequent processing
Solution Approach 2:
The frame acts as an intermediary element between the component chip and carrier substrate. It provides both mechanical support and sealing function, with its planar surface ensuring uniform contact that prevents harmful outgassing from entering the cavity while still allowing the hollow space to exist
2Stability of the object's composition
If the frame height is not adapted to the bump height, then the component chip may not contact the frame properly, but mechanical tension forces act on the metallization and tilting occurs
Solution Approach 1:
The frame height parameter is specifically designed to match the bump height, creating a geometric fit that ensures the component chip contacts the frame at the correct position. This parameter matching prevents mechanical tension on the metallization and avoids tilting of the chip
Solution Approach 2:
The planar top surface of the frame creates an equipotential contact surface, ensuring uniform contact pressure distribution across the bottom surface of the component chip. This prevents localized stress concentrations that would cause mechanical tension on the metallization and tilting
3Adaptability or versatility
If the carrier substrate is uneven or non-linearly distorted, then mounting flexibility is improved, but the closure of the cavity and sealing effectiveness deteriorates
Solution Approach 1:
The frame is pre-formed with a planar top surface that serves as a reference plane for mounting the component chip. This preliminary planarization compensates for any unevenness in the carrier substrate, ensuring effective cavity closure even when mounted on distorted substrates
Solution Approach 2:
The frame serves as an intermediary that decouples the mounting interface from the carrier substrate surface. Its planar top surface provides a stable mounting platform that ensures proper cavity closure, while the frame itself can accommodate substrate unevenness through its structural design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design ensures minimal mechanical tension on the component chip, prevents outgassing, and achieves hermetic sealing, effectively protecting sensitive components from environmental influences while maintaining electrical functionality.
Implementation Method 1
The electrical and mechanical connection between the component chip and the carrier substrate having electrical wiring is realized by means of bumps
Implementation Method 2
the planar surface of the frame provides a positive-fit contact with the component chip lying on the frame
Implementation Method 3
because the thermal expansion coefficients of the bumps and solder frame are very well matched
Implementation Method 4
hermetic sealing using a combination of metal layers and laminate films
Data Source
AI summary
The electrical and mechanical connection between a component chip and a carrier substrate having electrical wiring is realized by means of bumps. A support frame that is adapted in its height to the height of the bumps is arranged between the carrier substrate and the component chip and has a planar or planarized surface, so that it contacts closely to the bottom side of the component chip. Different covers are proposed for the additional encapsulation.