Flip-Chip Package Power Ground Strips for Low Impedance Decoupling
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Solution Overview
Problem
Conventional flip-chip packages with decoupling capacitors face increased impedance in interconnect paths due to multiple microvias, rendering them ineffective in high-frequency switching applications.
Innovation Solution
The use of ground strips and power strips on the top surface of the package substrate, electrically coupled to microvias that connect to power and ground planes, allows direct solder bump coupling between the flip-chip semiconductor die and decoupling capacitors, eliminating the need for microvias in the interconnect path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional flip-chip packages use microvias to connect decoupling capacitors to power and ground layers, then the decoupling capacitors can be electrically coupled to the flip-chip, but the impedance of the interconnect path increases significantly
Solution Approach 1:
The patent extracts and eliminates the microvia components from the interconnect path between the flip-chip and decoupling capacitors. By using direct solder bump connections instead of microvias, the harmful impedance-introducing elements are removed while maintaining the essential electrical coupling function.
Solution Approach 2:
The patent transitions from a vertical through-substrate microvia connection (z-dimension) to a surface-level solder bump connection approach. The power and ground strips are disposed on the top surface of the package substrate, changing the connection geometry from deep vertical pathways to shallow surface pathways, thereby reducing impedance.
2Reliability
If multiple microvias are used to connect the flip-chip to decoupling capacitors, then electrical coupling is achieved, but the package complexity and manufacturing difficulty increase
Solution Approach 1:
The patent removes the complex multi-layer microvia structure from the package design. By using simple surface-mounted power and ground strips with direct solder bump connections, the package structure is simplified while maintaining reliable electrical coupling between the flip-chip and decoupling capacitors.
Solution Approach 2:
Instead of routing connections through the substrate via microvias (conventional approach), the patent inverts the approach by bringing the power and ground connections to the top surface of the substrate. This inversion simplifies the interconnect path and reduces manufacturing complexity.
3Adaptability or versatility
If microvias are used in the interconnect path, then decoupling capacitors can be mounted on the top layer, but the impedance increases rendering them ineffective in high frequency applications
Solution Approach 1:
The patent extracts the impedance-introducing microvia elements from the signal path. By using direct solder bump connections between the flip-chip, power/ground strips, and decoupling capacitors, the harmful impedance is eliminated, enabling effective high-frequency operation.
Solution Approach 2:
The patent changes the physical parameters of the interconnect path by replacing long, narrow microvia channels with short, wide solder bump connections. This parameter change (increasing cross-sectional area, decreasing path length) dramatically reduces impedance and enables high-frequency applicability.
Data Source
AI summary
A package for a flip-chip integrated circuit device and a packaged flip-chip integrated circuit device that include ground strips and power strips disposed on the top surface of the package substrate. Decoupling capacitors are disposed over and electrically coupled to a ground strip and are disposed over and electrically coupled to a power strip. Microvias electrically couple the power strips to a power plane and electrically couple the ground strip to a ground plane. Each power strip and ground strip extend within a die attach region of the package substrate such that a semiconductor die can be bonded thereto for coupling power and ground between the semiconductor die and the decoupling capacitors. The power strip and ground strip provide low impedance pathways between the flip-chip semiconductor die and the decoupling capacitors. Thereby, effective decoupling capacitance is provided that is suitable for high frequency applications.